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AN77L03 Datasheet(PDF) 6 Page - Panasonic Semiconductor |
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AN77L03 Datasheet(HTML) 6 Page - Panasonic Semiconductor |
6 / 8 page 6 Voltage Regulators AN77L00/AN77L00M Series Output voltage Input stability Load stability Bias current under no load Bias current fluctuation under load Bias current before regulation start Ripple rejection ratio Min. input/output voltage difference (1) Min. input/output voltage difference (2) Output noise voltage Output voltage temperature coefficient Tj=25˚C VI=10.9 to 20.9V, Tj=25˚C IO= 0 to 100mA, Tj=25˚C IO= 0mA, Tj=25˚C IO= 0 to 100mA, Tj=25˚C VI= 9.0V, IO=0mA, Tj=25˚C VI=10.9 to 12.9V, f=120Hz VI= 9.0V, IO=50mA, Tj=25˚C VI= 9.0V, IO=100mA, Tj=25˚C f=10Hz to 100kHz Tj= –30 to+125˚C 9.6 50 10 7 14 1.2 3 1.5 60 0.13 0.29 165 0.67 10.4 100 100 1.7 5 5 0.25 0.55 Parameter Symbol Condition min typ max Unit s Electrical Characteristics (Ta=25˚C) • AN77L10/M (10V, 100mA Type) Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at joints of the chip may be ignored. Note 2) VI=11V, IO=50mA, CO=10 µF unless otherwise specified. VO REGIN REGL Ibias ∆I bias Irush RR VDIF (min) 1 VDIF (min) 2 Vno ∆V O/Ta V mV mV mA mA mA dB V V µV mV/˚C Output voltage Input stability Load stability Bias current under no load Bias current fluctuation under load Bias current before regulation start Ripple rejection ratio Min. input/output voltage difference (1) Min. input/output voltage difference (2) Output noise voltage Output voltage temperature coefficient Tj=25˚C VI=12.98 to 22.98V, Tj=25˚C IO= 0 to 100mA, Tj=25˚C IO= 0mA, Tj=25˚C IO= 0 to 100mA, Tj=25˚C VI=10.8V, IO=0mA, Tj=25˚C VI=12.98 to 14.98V, f=120Hz VI=10.8V, IO=50mA, Tj=25˚C VI=10.8V, IO=100mA, Tj=25˚C f=10Hz to 100kHz Tj=–30 to+125˚C 11.52 48 12 8 15 1.4 3 1.5 58 0.13 0.31 190 0.8 12.48 120 120 1.9 5 5 0.25 0.6 Parameter Symbol Condition min typ max Unit • AN77L12/M (12V, 100mA Type) Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms)and the characteristic drift with temperature rise at joints of the chip may be ignored. Note 2) VI=13V, IO=50mA, CO=10 µF unless otherwise specified. VO REGIN REGL Ibias ∆I bias Irush RR VDIF (min) 1 VDIF (min) 2 Vno ∆V O/Ta V mV mV mA mA mA dB V V µV mV/˚C • For the AN77L00/M series, the gain inside the IC is set high to improve the performance. For the reason, use the capacitor of 10 µF or more when the power line in the output side should be long. In addition, install the capacitor in the output side as near as possible to the IC. AN77L00/M series – + VI VO 0.33 µF 10 µF s Application Circuit |
Similar Part No. - AN77L03 |
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Similar Description - AN77L03 |
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