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AN8000 Datasheet(PDF) 3 Page - Panasonic Semiconductor

Part No. AN8000
Description  3-pin Positive Output Low Dropout Voltage Regulator 50mA Type
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Maker  PANASONIC [Panasonic Semiconductor]
Homepage  http://www.panasonic.com/industrial/
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AN8000 Datasheet(HTML) 3 Page - Panasonic Semiconductor

   
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VO
3.12
V
3
Tj=25˚C
REGIN
mV
VI=3.5 to 9V, Tj=25˚C
REGL
25
mV
IO=1 to 40mA, Tj=25˚C
mV
VDIF (min.)
V
0.07
VI=2.9V, IO=20mA, Tj=25˚C
V
VI=2.9V, IO=50mA, Tj=25˚C
IO=1 to 50mA, Tj=25˚C
mA
0.6
IO=0mA, Tj=25˚C
Note1) The specified condition Tj=25˚C means that the test should be conducted with each test time reduced (within 10ms) so that
the drift in characteristic value due to a temperature rise at chip junction can be ignored.
Note2) Unless otherwise specified, VI=4V, IO=20mA, CO=10
µF
Ibias
dB
VI=4 to 6V, f=120Hz
RR
µV
Vno
mV/˚C
0.15
f=10Hz to 100kHz
∆V
O/Ta
Tj=–30 to+125˚C
30
50
0.2
0.3
1
2.88
58
0.12
3
9
15
70
70
Parameter
Symbol
Condition
min
typ
max
Output voltage
Line regulation
Load regulation
Minimum I/O voltage difference
Bias current
Ripple rejection ratio
Output noise voltage
Output voltage temperature coefficient
Unit
· AN8003/AN8003M (3V Type)
s Electrical Characteristics (Ta=25˚C)
Tj=25˚C
VI=4.5 to 10V, Tj=25˚C
IO=1 to 40mA, Tj=25˚C
VDIF (min.)
VI=3.8V, IO=20mA, Tj=25˚C
VI=3.8V, IO=50mA, Tj=25˚C
IO=1 to 50mA, Tj=25˚C
IO=0mA, Tj=25˚C
Note1) The specified condition Tj=25˚C means that the test should be conducted with each test time reduced (within 10ms) so that
the drift in characteristic value due to a temperature rise at chip junction can be ignored.
Note2) Unless otherwise specified, VI=5V, IO=20mA, CO=10
µF
VI=5 to 7V, f=120Hz
µV
Vno
mV/˚C
f=10Hz to 100kHz
∆V
O/Ta
Tj=–30 to+125˚C
· AN8004/AN8004M (4V Type)
VO
4.16
V
4
REGIN
mV
REGL
30
mV
mV
V
0.07
V
mA
0.6
Parameter
Symbol
Condition
min
typ
max
Output voltage
Line regulation
Load regulation
Minimum I/O voltage difference
Bias current
Ripple rejection ratio
Output noise voltage
Output voltage temperature coefficient
Unit
Ibias
dB
RR
Vno
0.2
40
50
0.2
0.3
1
3.84
56
0.12
3.5
10
20
80
67
Tj=25˚C
VI=4 to 9.5V, Tj=25˚C
IO=1 to 40mA, Tj=25˚C
VDIF (min.)
VI=3.4V, IO=20mA, Tj=25˚C
VI=3.4V, IO=50mA, Tj=25˚C
IO=1 to 50mA, Tj=25˚C
IO=0mA, Tj=25˚C
Note1) The specified condition Tj=25˚C means that the test should be conducted with each test time reduced (within 10ms) so that
the drift in characteristic value due to a temperature rise at chip junction can be ignored.
Note2) Unless otherwise specified, VI=4.5V, IO=20mA, CO=10
µF
VI=4.5 to 6.5V, f=120Hz
µV
Vno
mV/˚C
f=10Hz to 100kHz
∆V
O/Ta
Tj=–30 to+125˚C
· AN8035/AN8035M (3.5V Type)
VO
3.64
V
3.5
REGIN
mV
REGL
30
mV
mV
V
0.07
V
mA
0.6
Ibias
dB
RR
Vno
0.2
40
50
0.2
0.3
1
3.36
57
0.12
3.5
10
20
75
69
Parameter
Symbol
Condition
min
typ
max
Output voltage
Line regulation
Load regulation
Minimum I/O voltage difference
Bias current
Ripple rejection ratio
Output noise voltage
Output voltage temperature coefficient
Unit


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