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MSM54V12222B Datasheet(PDF) 1 Page - OKI electronic componets

Part # MSM54V12222B
Description  262,214-Word12-Bit Field Memory
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Manufacturer  OKI [OKI electronic componets]
Direct Link  http://www.oki.com
Logo OKI - OKI electronic componets

MSM54V12222B Datasheet(HTML) 1 Page - OKI electronic componets

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OKI Semiconductor
FEDS54V12222B-01
Issue Date: Nov.,20, 2002
MSM54V12222B
262,214-Word
× 12-Bit Field Memory
1/17
GENERAL DESCRIPTION
The OKI MSM54V12222B is a high performance 3-Mbit, 256K
× 12-bit, Field Memory. It is especially designed
for high-speed serial access applications such as HDTVs, conventional NTSC TVs, VTRs, digital movies and
Multi-media systems. MSM54V12222B is a FRAM for wide or low end use in general commodity TVs and VTRs
exclusively. MSM54V12222B is not designed for the other use or high end use in medical systems, professional
graphics systems which require long term picture storage, data storage systems and others. More than two
MSM54V12222Bs can be cascaded directly without any delay devices among the MSM54V12222Bs. (Cascading
of MSM54V12222B provides larger storage depth or a longer delay).
Each of the 12-bit planes has separate serial write and read ports. These employ independent control clocks to
support asynchronous read and write operations. Different clock rates are also supported that allow alternate data
rates between write and read data streams.
The MSM54V12222B provides high speed FIFO, First-In First-Out, operation without external refreshing:
MSM54V12222B refreshes its DRAM storage cells automatically, so that it appears fully static to the users.
Moreover, fully static type memory cells and decoders for serial access enable the refresh free serial access
operation, so that serial read and/or write control clock can be halted high or low for any duration as long as the
power is on. Internal conflicts of memory access and refreshing operations are prevented by special arbitration
logic.
The MSM54V12222B’s function is simple, and similar to a digital delay device whose delay-bit-length is easily
set by reset timing. The delay length, number of read delay clocks between write and read, is determined by
externally controlled write and read reset timings.
Additional SRAM serial registers, or line buffers for the initial access of 256
× 12-bit enable high speed
first-bit-access with no clock delay just after the write or read reset timings.
Additionally, the MSM54V12222B has write mask function or input enable function (IE), and read-data skipping
function or output enable function (OE) . The differences between write enable (WE) and input enable (IE), and
between read enable (RE) and output enable (OE) are that WE and RE can stop serial write/read address
increments, but IE and OE cannot stop the increment, when write/read clocking is continuously applied to
MSM54V12222B. The input enable (IE) function allows the user to write into selected locations of the memory
only, leaving the rest of the memory contents unchanged. This facilitates data processing to display a “picture in
picture” on a TV screen.
The MSM54V12222B is similar in operation and functionality to OKI 1-Mbit Field Memory MSM51V4222C and
2-Mbit Field Memory MSM51V8222A. Three MSM51V4222Cs or one MSM51V4222C plus one
MSM51V8222A can be replaced simply by one MSM54V12222B.


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