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D163DT70UI Datasheet(PDF) 3 Page - Advanced Micro Devices |
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D163DT70UI Datasheet(HTML) 3 Page - Advanced Micro Devices |
3 / 57 page This Data Sheet states AMD’s current technical specifications regarding the Products described herein. This Data Sheet may be revised by subsequent versions or modifications due to changes in technical specifications. Publication# 21533 Rev: E Amendment/+4 Issue Date: May 26, 2004 Refer to AMD’s Website (www.amd.com) for the latest information. Am29DL16xD 16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory DISTINCTIVE CHARACTERISTICS ARCHITECTURAL ADVANTAGES ■ Simultaneous Read/Write operations — Data can be continuously read from one bank while executing erase/program functions in other bank — Zero latency between read and write operations ■ Multiple bank architectures — Four devices available with different bank sizes (refer to Table 2) ■ SecSi ™ (Secured Silicon) Sector — Current version of device has 64 Kbytes; future versions will have 256 bytes — Factory locked and identifiable: 16 bytes available for secure, random factory Electronic Serial Number; verifiable as factory locked through autoselect function. ExpressFlash option allows entire sector to be available for factory-secured data — Customer lockable: Can be read, programmed, or erased just like other sectors. Once locked, data cannot be changed ■ Zero Power Operation — Sophisticated power management circuits reduce power consumed during inactive periods to nearly zero ■ Package options — 48-ball Very Thin Profile Fine-pitch BGA — 48-ball Fine-pitch BGA — 64-ball Fortified BGA — 48-pin TSOP ■ Top or bottom boot block ■ Manufactured on 0.23 µm process technology — Compatible with Am29DL16xC devices ■ Compatible with JEDEC standards — Pinout and software compatible with single-power-supply flash standard PERFORMANCE CHARACTERISTICS ■ High performance — Access time as fast 70 ns — Program time: 7 µs/word typical utilizing Accelerate function ■ Ultra low power consumption (typical values) — 2 mA active read current at 1 MHz — 10 mA active read current at 5 MHz — 200 nA in standby or automatic sleep mode ■ Minimum 1 million write cycles guaranteed per sector ■ 20 Year data retention at 125 °C — Reliable operation for the life of the system SOFTWARE FEATURES ■ Data Management Software (DMS) — AMD-supplied software manages data programming and erasing, enabling EEPROM emulation — Eases sector erase limitations ■ Supports Common Flash Memory Interface (CFI) ■ Erase Suspend/Erase Resume — Suspends erase operations to allow programming in same bank ■ Data# Polling and Toggle Bits — Provides a software method of detecting the status of program or erase cycles ■ Unlock Bypass Program command — Reduces overall programming time when issuing multiple program command sequences HARDWARE FEATURES ■ Any combination of sectors can be erased ■ Ready/Busy# output (RY/BY#) — Hardware method for detecting program or erase cycle completion ■ Hardware reset pin (RESET#) — Hardware method of resetting the internal state machine to reading array data ■ WP#/ACC input pin — Write protect (WP#) function allows protection of two outermost boot sectors, regardless of sector protect status — Acceleration (ACC) function accelerates program timing ■ Sector protection — Hardware method of locking a sector, either in-system or using programming equipment, to prevent any program or erase operation within that sector — Temporary Sector Unprotect allows changing data in protected sectors in-system |
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