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ZLR16300 Datasheet(PDF) 40 Page - Zilog, Inc. |
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ZLR16300 Datasheet(HTML) 40 Page - Zilog, Inc. |
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40 / 94 page  CrimzonTMZLR16300 Product Specification PS021413-1205 Functional Description 33 In Demodulation Mode, when set to 0, T16 captures and reloads on detection of all the edges. When set to 1, T16 captures and detects on the first edge but ignores the subsequent edges. For details, see the description of T16 Demodula- tion Mode on page 41. Time_Out This bit is set when T16 times out (terminal count reached). To reset the bit, write a 1 to this location. T16_Clock This bit defines the frequency of the input signal to Counter/Timer16. Capture_INT_Mask This bit is set to allow an interrupt when data is captured into LO16 and HI16. Counter_INT_Mask Set this bit to allow an interrupt when T16 times out. P35_Out This bit defines whether P35 is used as a normal output pin or T16 output. CTR3 T8/T16 Control Register—CTR3(0D)03h Table 14 lists and briefly describes the fields for this register. This register allow the T8 and T16 counters to be synchronized. Table 14. CTR3(0D)03h T8/T16 Control Register T16_Enable 7------- R R W W 0* 1 0 1 Counter Disabled Counter Enabled Stop Counter Enable Counter T8 Enable -6------ R/W 0** 1 0 1 Counter Disabled Counter Enabled Stop Counter Enable Counter Sync Mode --5----- R/W 0* 1 Disable Sync Mode Enable Sync Mode Reserved ---43210 R/W 1 x Always reads 11111 No Effect * Indicates the value upon Power-On Reset. *** Indicates the value upon Power-On Reset. Not reset with a Stop Mode recovery. |
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