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EZ80F92AZ020SG Datasheet(PDF) 8 Page - Zilog, Inc. |
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EZ80F92AZ020SG Datasheet(HTML) 8 Page - Zilog, Inc. |
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8 / 266 page  PS015309-1004 PRELIMINARY List of Figures eZ80F92/eZ80F93 Product Specification viii List of Figures Figure 1. eZ80F92 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Figure 2. 100-Pin LQFP Configuration of the eZ80F92 Device . . . . . . . . . . . . . . . . . . 4 Figure 3. GPIO Port Pin Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Figure 4. Example: Memory Chip Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Figure 5. Wait Input Sampling Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Figure 6. Example: Z80 Bus Mode Write Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Figure 7. Intel™ Bus Mode Signal and Pin Mapping . . . . . . . . . . . . . . . . . . . . . . . . . 57 Figure 8. Example: Intel™ Bus Mode Read Timing—Separate Address and Data Buses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Figure 9. Example: Intel™ Bus Mode Write Timing—Separate Address and Data Buses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Figure 10. Example: Intel™ Bus Mode Read Timing—Multiplexed Address and Data Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Figure 11. Example: Intel™ Bus Mode Write Timing—Multiplexed Address and Data Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 Figure 12. Motorola Bus Mode Signal and Pin Mapping . . . . . . . . . . . . . . . . . . . . . . . 64 Figure 13. Watch-Dog Timer Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Figure 14. PRT Single Pass Mode Operation Example . . . . . . . . . . . . . . . . . . . . . . . . 79 Figure 15. UART Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 Figure 16. Infrared System Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124 Figure 17. SPI Master Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130 Figure 18. SPI Slave Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130 Figure 19. I2C Clock and Data Relationship . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141 Figure 20. START and STOP Conditions In I2C Protocol . . . . . . . . . . . . . . . . . . . . . 141 Figure 21. I2C Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143 Figure 22. Clock Synchronization In I2C Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . 144 Figure 23. Typical ZDI Debug Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161 Figure 24. Schematic For Building a Target Board ZPAKII Connector . . . . . . . . . . 162 Figure 25. ZDI Write Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163 Figure 26. ZDI Read Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164 Figure 27. ZDI Address Write Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165 Figure 28. eZ80F92 On-Chip RAM Memory Addressing Example . . . . . . . . . . . . . . 189 Figure 29. eZ80F93 On-Chip RAM Memory Addressing Example . . . . . . . . . . . . . . 190 |
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