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LM27964 Datasheet(PDF) 9 Page - National Semiconductor (TI) |
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LM27964 Datasheet(HTML) 9 Page - National Semiconductor (TI) |
9 / 13 page Circuit Description (Continued) The master releases the SDIO line (HIGH) during the ac- knowledge clock pulse. The LM27964 pulls down the SDIO line during the 9th clock pulse, signifying an acknowledge. The LM27964 generates an acknowledge after each byte has been received. After the START condition, the I 2C master sends a chip address. This address is seven bits long followed by an eighth bit which is a data direction bit (R/W). The LM27964 address is 36h. For the eighth bit, a “0” indicates a WRITE and a “1” indicates a READ. The second byte selects the register to which the data will be written. The third byte contains data to write to the selected register. I 2C COMPATIBLE CHIP ADDRESS The chip address for LM27964 is 0110110, or 36h. INTERNAL REGISTERS OF LM27964 Register Internal Hex Address Power On Value General Purpose Register 10h 0000 0000 Bank A and Bank B Birghtness Control Register A0h 0000 0000 KEYPAD Brightness Control B0h 0000 0000 Note: ENA: Enables DxA LED drivers (Main Display) ENB: Enables DxB LED drivers (Sub Display) ENK: Enables Keypad Driver 20138112 FIGURE 3. Write Cycle w = write (SDIO = "0") r = read (SDIO = "1") ack = acknowledge (SDIO pulled down by either master or slave) rs = repeated start id = chip address, 36h for LM27964 20138109 FIGURE 4. Chip Address 20138108 FIGURE 5. General Purpose Register Description Internal Hex Address: 10h 20138107 FIGURE 6. General Purpose Register Example www.national.com 9 |
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