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9601-01 Datasheet(PDF) 4 Page - Peregrine Semiconductor Corp. |
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9601-01 Datasheet(HTML) 4 Page - Peregrine Semiconductor Corp. |
4 / 14 page Product Specification PE9601 Page 4 of 14 ©2005 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0025-05 │ UltraCMOS™ RFIC Solutions 30 fp ALL Output Monitor pin for main divider output. Switching activity can be disabled through enhancement register programming or by floating or grounding VDD pin 31. 31 VDD-fp ALL (Note 2) VDD for fp. 32 Dout Serial, Parallel Output Data Out. The MSEL signal and the raw prescaler output are available on Dout through enhancement register programming. 33 VDD ALL (Note 1) Same as pin 1. 34 Cext ALL Output Logical “OR” of PD_U and PD_D terminated through an on chip, 2 kW series resistor. Connecting Cext to an external capacitor will low pass filter the input to the inverting amplifier used for driving LD. 35 VDD ALL (Note 1) Same as pin 1. 36 CP ALL Output Charge pump current is sourced for “up” when fc leads fp and sinked for “down” when fc lags fp. 37 NC ALL No connection. 38 VDD-fc ALL (Note 2) VDD for fc 39 fc ALL Output Monitor pin for reference divider output. Switching activity can be disabled through enhancement register programming or by floating or grounding VDD pin 38. 40 GND ALL Ground. 41 GND ALL Ground. 42 fr ALL Input Reference frequency input. See Figure 4. 43 LD ALL Output, OD Lock detect and open drain logical inversion of Cext. When the loop is in lock, LD is high impedance, otherwise LD is a logic low (“0”). 44 Enh Serial, Parallel Input Enhancement mode. When asserted low (“0”), enhancement register bits are functional. Pin No. Pin Name Interface Mode Type Description Table 1. Pin Descriptions (continued) Note 1: VDD pins 1, 11, 12, 23, 33, and 35 are connected by diodes and must be supplied with the same positive voltage level. Note 2: VDD pins 31 and 38 are used to enable test modes and should be left floating. Note 3: All digital input pins have 70k ohm pull-down resistors to ground. 2.8pF 125K PIN 42 Figure 4. Looking into the device PIN 42 - fr |
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