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IDT709269S12PFI Datasheet(PDF) 2 Page - Integrated Device Technology |
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IDT709269S12PFI Datasheet(HTML) 2 Page - Integrated Device Technology |
2 / 15 page 6.42 IDT709269S/L Preliminary High-Speed 16K x 16 Synchronous Pipelined Dual-Port Static RAM Industrial and Commercial Temperature Ranges 2 Index 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 IDT709269PF PN100-1(4) 100-PIN TQFP TOP VIEW(5) NC I/O10R I/O11R I/O12R I/O13R I/O14R I/O15R GND UBR LBR 3493 drw 02 I/O15L OEL R/ WL CNTRSTL CE1L CE0L Vcc NC A13L NC NC A12L A11L A10L A9L I/O10L I/O11L I/O12L I/O13L I/O14L UBL LBL GND FT/PIPER OER R/ WR CNTRSTR CE1R CE0R NC NC GND A12R A13R A11R A10R A9R FT/PIPEL NC NC , Description: The IDT709269 is a high-speed 16K x 16 bit synchronous pipelined Dual-Port RAM. The memory array utilizes Dual-Port memory cells to allow simultaneous access of any address from both ports. Registers on control, data, and address inputs provide minimal setup and hold times. The timing latitude provided by this approach allows systems to be designed with very short cycle times. Pin Configuration(1,2,3) NOTES: 1. All VCC pins must be connected to power supply. 2. All GND pins must be connected to ground supply. 3. Package body is approximately 14mm x 14mm x 1.4mm 4. This package code is used to reference the package diagram. 5. This text does not indicate orientation of the actual part-marking. With an input data register, the IDT709269 has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. Fabricated using IDT’s CMOS high-performance technology, these devices typically operate on only 950mW of power. |
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