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4210-22 Datasheet(PDF) 2 Page - Peregrine Semiconductor Corp.

Part No. 4210-22
Description  SPDT UltraCMOS??RF Switch DC - 3000 MHz
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Manufacturer  PEREGRINE [Peregrine Semiconductor Corp.]
Direct Link  http://www.peregrine-semi.com
Logo PEREGRINE - Peregrine Semiconductor Corp.

4210-22 Datasheet(HTML) 2 Page - Peregrine Semiconductor Corp.

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Product Specification
PE4210
Page 2 of 7
©2005 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0037-05
│ UltraCMOS™ RFIC Solutions
Table 2. Pin Descriptions
Note 1: All RF pins must be DC blocked with an external
series capacitor or held at 0 VDC.
Figure 3. Pin Configuration (Top View)
Table 4. Absolute Maximum Ratings
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the specified rating in Table 4.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Table 3. DC Electrical Specifications
4210
1
2
3
4
8
7
6
5
CTRL
RFC
GND
RF1
GND
VDD
GND
RF2
Table 5. Control Logic Truth Table
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage.
Functional operation should be restricted to the
limits in the DC Electrical Specifications table.
Exposure to absolute maximum ratings for
extended periods may affect device reliability.
Pin
No.
Pin
Name
Description
1
VDD
Nominal 3 V supply connection. A by-
pass capacitor (100 pF) to the ground
plane should be placed as close as pos-
sible to the pin
2
CTRL
CMOS or TTL logic level:
High = RFC to RF1 signal path
Low = RFC to RF2 signal path
3
GND
Ground connection. Traces should be
physically short and connected to ground
plane for best performance.
4
RFC
Common RF port for switch (Note 1)
5
RF2
RF2 port (Note 1)
6
GND
Ground connection. Traces should be
physically short and connected to ground
plane for best performance.
7
GND
Ground connection. Traces should be
physically short and connected to ground
plane for best performance.
8
RF1
RF1 port (Note 1)
Symbol
Parameter/Conditions
Min
Max
Units
VDD
Power Supply Voltage
-0.3
4.0
V
VI
Voltage on any input
-0.3
VDD + 0.3
V
TST
Storage temperature
range
-65
150
°C
TOP
Operating temperature
range
-40
85
°C
P
IN
Input power (50
Ω)
18
dBm
VESD
ESD Voltage (Human
Body Model)
200
V
Parameter
Min
Typ
Max
Units
VDD Power Supply
Voltage
2.7
3.0
3.3
V
IDD Power Supply Current
(VDD = 3V, VCNTL = 3)
250
500
nA
Control Voltage High
0.7x VDD
V
Control Voltage Low
0.3x VDD
V
Control Voltage
Signal Path
CTRL = CMOS or TTL High
RFC to RF1
CTRL = CMOS or TTL Low
RFC to RF2
Control Logic
The control logic input pin (CTRL) is typically
driven by a 3-volt CMOS logic level signal, and
has a threshold of 50% of VDD. For flexibility to
support systems that have 5-volt control logic
drivers, the control logic input has been designed
to handle a 5-volt logic HIGH signal. (A minimal
current will be sourced out of the VDD pin when the
control logic input voltage level exceeds VDD.)


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