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4220-21 Datasheet(PDF) 3 Page - Peregrine Semiconductor Corp. |
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4220-21 Datasheet(HTML) 3 Page - Peregrine Semiconductor Corp. |
3 / 7 page Product Specification PE4220 Page 3 of 7 Document No. 70-0028-09 │ www.psemi.com ©2005 Peregrine Semiconductor Corp. All rights reserved. Evaluation Kit The SPDT Switch Evaluation Kit board was designed to ease customer evaluation of the PE4220 SPDT switch. The RF common port is connected through a 50 Ω transmission line to the top left SMA connector, J1. Port 1 and Port 2 are connected through 50 Ω transmission lines to the top two SMA connectors on the right side of the board, J3 and J4. A through transmission line connects SMA connectors J6 and J8. This transmission line can be used to estimate the loss of the PCB over the environmental conditions being evaluated. The board is constructed of a two metal layer FR4 material with a total thickness of 0.031”. The bottom layer provides ground for the RF transmission lines. The transmission lines were designed using a coplanar waveguide model with a trace width of 0.030”, trace gaps of 0.007”, dielectric thickness of 0.028”, metal thickness of 0.0014” and ε r of 4.4. Note that the predominate mode for these transmission lines is coplanar waveguide with a ground plane. J2 provides a means for controlling DC and digital inputs to the device. Starting from the lower left pin, the second pin to the right (J2-3) is connected to the device CTRL input. The fourth pin to the right (J2-7) is connected to the device VDD input. A decoupling capacitor (100 pF) is provided on both CTRL and VDD traces. It is the responsibility of the customer to determine proper supply decoupling for their design application. Removing these components from the evaluation board has not been shown to degrade RF performance. Figure 4. Evaluation Board Layout Figure 5. Evaluation Board Schematic Peregrine specification 101/0037 Peregrine specification 102/0035 |
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