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MIC21LV32 Datasheet(PDF) 29 Page - Microchip Technology

Part No. MIC21LV32
Description  36V Dual Phase, Advanced COT Buck Controller Stackable for Multiphase Operation
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MIC21LV32 Datasheet(HTML) 29 Page - Microchip Technology

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 2021 Microchip Technology Inc.
DS20006513A-page 29
MIC21LV32
FIGURE 4-17:
Use of an NTC Resistance
to Compensate the RDSON Temperature
Coefficient on the DROOP Pin.
The idea in Figure 4-14 is that increasing DROOP volt-
age with temperature at the IOUT(MAX) (positive tem-
perature coefficient) is compensated by the RNTC
(negative temperature coefficient) to keep the node of
the divider, Div_DROOP_ZeroTC, constant versus
temperature.
The rest of the calculations are similar to the afore-
mentioned case where the sensing current was
temperature-insensitive. In case the AVP is not
necessary, a 10 kΩ, 1 nF RC filter to ground can be
used to have a reading of the filtered output current.
4.5.10
MULTIPHASING (STACKING)
The MIC21LV32 can be configured for multiphase
operation up to eight phases. The MIC21LV32 has four
pins allocated for multiphasing. The APO pin of the
host controller is connected to the NPI pin of the next
secondary controller. The host and secondary CSH,
ONR pins are connected together. Once the host
finishes the on requests, it passes the control to the
next secondary through the APO pin. The current share
bus will maintain equal current sharing between host
and secondary controllers.
The ONR is a bidirectional pin. The desired secondary
controller’s FBS pin is connected to VDD to program
the controller as secondary. This will make the ONR pin
of the secondary controller become input only. Second-
ary controllers accept ONR from the host controller and
serve the on-time request.
Figure 4-18 shows two MIC21LV32 devices connected
in a 4-phase configuration. The NPI and APO pins of
the MIC21LV32 are connected in a daisy chain to form
a stackable power supply up to eight phases.
FIGURE 4-18:
MIC21LV32 Connected in
4-Phase Configuration.
In order to get a stricter control over behavior if one
member of the daisy chain is damaged or going to be
damaged, or is in short or thermal shutdown, several
measures were implemented.
1.
The host is the only one programming the ILIM.
The secondaries are just reading the voltage on
ILIM; as a common point, they do not have any
programming current coming out.
2.
The soft start pin is driven up with 1.2 µA from all
members of the daisy chain. When any of the
members of the daisy chain pulls down the SS
pin in case of thermal shutdown, or short circuits
more than seven cycles, a new automatic restart
is triggered on the falling edge of SS. Any of the
daisy chain members can keep low closed to 0
in the SS pin, and in that case, all members are
in High-Z and wait until SS is released to go up.
To illustrate if one member has the LDO not
coming up, this will keep the SS pin in low.
MIC21LV32
FBS
RFBB1
DROOP
VOUT
RINJ
CINJ
RIP_INJ
GFB
RDROOP
RFBB2
RFBT
CFF
RS
RP
RNTC
Div_DROOP_Z eroTC
RBIAS
MIC21LV32
Host
CSH
ONR
APO
NPI
FBS
GFB
RIP_INJ
MIC21LV32
Secondary
CSH
ONR
APO
NPI
FBS
GFB
RIP_INJ
SS
VOUT
VDD
SS
DH1
SW1
DL1
DH2
SW2
DL2
DH1
SW1
DL1
DH2
SW2
DL2
ILIM
ILIM


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