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ICS601-21 Datasheet(PDF) 2 Page - Integrated Circuit Systems

Part No. ICS601-21
Description  LOW PHASE NOISE CLOCK MULTIPLIER
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Maker  ICST [Integrated Circuit Systems]
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ICS601-21 Datasheet(HTML) 2 Page - Integrated Circuit Systems

   
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LOW PHASE NOISE CLOCK MULTIPLIER
MDS 601-21 H
2
Revision 040204
Integr ated Circuit System s l 525 Ra ce Stree t , Sa n Jose, CA 951 26 l te l (4 08) 297 -1 201 l
www.ics t.co m
ICS601-21
Pin Assignment
Multiplier Select Table
0 = connect directly to ground
1 = connect directly to VDD
Pin Descriptions
1
2
3
GN D
4
VD D
5
6
GND
7
8
CLK
nC LK
S1
GN D
X2
VD D
S2
VD D
16
X1
VD D
GN D
S0
VD D
15
14
13
12
11
10
9
16 Pin (173 m il) TSSOP
S2
S1
S0
Multiplier
00
0
x1
00
1
x2
01
0
x3
01
1
x4
10
0
x5
10
1
x6
11
0
x8
11
1
x16
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
X1
XI
Crystal or clock input. Connect to a 10-27 MHz fundamental parallel mode
crystal or clock input.
2 - 4
VDD
Power
Connect to +3.3 V.
5
GND
Power
Connect to ground.
6
VDD
Power
Connect to +3.3 V.
7 - 8
GND
Power
Connect to ground.
9
S2
Input
Select pin 2. Internal pull-up resistor.
10
S1
Input
Select pin 1. Internal pull-up resistor.
11
S0
Input
Select pin 0. Internal pull-up resistor.
12
VDD
Power
Connect to +3.3 V.
13
nCLK
Output
Inverted differential clock output.
14
CLK
Output
Differential clock output.
15
GND
Power
Connect to ground.
16
X2
XO
Crystal connection. Connect to 10-27MHz fundamental parallel mode crystal
or leave unconnected for clock input.


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