User Configurable Clock

MDS 525-01/02/11/12 Q

8

Revision 101105

Integrated Circuit Systems, Inc.

ICS525-01/02/11/12

NOTE 1: Phase relationship between input and output can change at power-up. For a fixed phase

relationship, see the ICS527.

NOTE 2: For 16 MHz, 100 MHz output. Use the -02 for lowest jitter.

Package dimensions are kept current with JEDEC Publication No. 95, MO-153

INDEX

AREA

1 2

28

D

E1

E

SEATING

PLANE

A

1

A

A

2

e

- C -

b

c

L

*For reference only. Controlling dimensions in mm.

Millimeters

Inches*

Symbol

Min

Max

Min

Max

A

1.351.75.053

.069

A1

0.10

0.25

.0040

.010

A2

--

1.50

--

.059

b

0.200.30.008

.012

C

0.180.25.007

.010

D

9.80

10.00

.386

.394

E

5.806.20.228

.244

E1

3.80

4.00

.150

.157

e

0.635 Basic

0.025 Basic

L

0.401.27.016

.050

α

0

°

8

°

0

°

8

°

aaa

--

0.10

--

0.004