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CLRC66103HNR Datasheet(PDF) 7 Page - NXP Semiconductors

Part # CLRC66103HNR
Description  High performance NFC frontend CLRC661 plus
Download  152 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

CLRC66103HNR Datasheet(HTML) 7 Page - NXP Semiconductors

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NXP Semiconductors
CLRC661
High performance NFC frontend CLRC661 plus
7 Pinning information
001aam004
heatsink
Transparent top view
TX1
(1)
DVDD
VDD
TVDD
SIGOUT
XTAL1
SIGIN/OUT7
XTAL2
TCK/OUT3
PDOWN
TMS/OUT2
CLKOUT/OUT6
TDI/OUT1
SCL
TDO/OUT0
SDA
8
17
7
18
6
19
5
20
4
21
3
22
2
23
1
24
terminal 1
index area
1. VSS - heat sink connection
Figure 2. Pinning configuration HVQFN32 (SOT617-1)
7.1 Pin description
Pin
Symbol
Type
Description
1
TDO / OUT0
O
test data output for boundary scan interface / general purpose output 0
2
TDI / OUT1
I
test data input boundary scan interface / general purpose output 1
3
TMS / OUT2
I
test mode select boundary scan interface / general purpose output 2
4
TCK / OUT3
I
test clock boundary scan interface / general purpose output 3
5
SIGIN /OUT7
I/O
Contactless communication interface output. / general purpose output 7
6
SIGOUT
O
Contactless communication interface input.
7
DVDD
PWR
digital power supply buffer [1]
8
VDD
PWR
power supply
9
AVDD
PWR
analog power supply buffer [1]
10
AUX1
O
auxiliary outputs: Pin is used for analog test signal
11
AUX2
O
auxiliary outputs: Pin is used for analog test signal
12
RXP
I
receiver input pin for the received RF signal.
13
RXN
I
receiver input pin for the received RF signal.
14
VMID
PWR
internal receiver reference voltage [1]
15
TX2
O
transmitter 2: delivers the modulated 13.56 MHz carrier
16
TVSS
PWR
transmitter ground, supplies the output stage of TX1, TX2
17
TX1
O
transmitter 1: delivers the modulated 13.56 MHz carrier
Table 3. Pin description
CLRC661
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 3.7 — 23 June 2021
COMPANY PUBLIC
456937
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