CLRC66103HN datasheet(69/152 Pages) NXP

Part #	CLRC66103HN

Description	High performance NFC frontend CLRC661 plus

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Manufacturer	NXP [NXP Semiconductors]

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NXP Semiconductors

CLRC661

High performance NFC frontend CLRC661 plus

Bit

Symbol

Description

5 to 4

T0Start

00b: The timer is not started automatically

01 b: The timer starts automatically at the end of the transmission

10 b: Timer is used for LFO trimming without underflow (Start/Stop on

PosEdge)

11 b: Timer is used for LFO trimming with underflow (Start/Stop on

PosEdge)

3

T0AutoRestart 1: the timer automatically restarts its count-down from

T0ReloadValue, after the counter value has reached the value zero.

0: the timer decrements to zero and stops.

The bit Timer1IRQ is set to logic 1 when the timer underflows.

2

-

RFU

1 to 0

T0Clk

00 b: The timer input clock is 13.56 MHz.

01 b: The timer input clock is 211,875 kHz.

10 b: The timer input clock is an underflow of Timer2.

11 b: The timer input clock is an underflow of Timer1.

Table 75. T0Control bits...continued

9.7.2.1 T0ReloadHi

High byte reload value of the Timer0.

Bit

7

6

5

4

3

2

1

0

Symbol

T0Reload Hi

Access

rights

r/w

Table 76. T0ReloadHi register (address 10h);

Bit

Symbol

Description

7 to 0

T0ReloadHi

Defines the high byte of the reload value of the timer. With the start

event, the timer loads the value of the registers T0ReloadValHi,

T0ReloadValLo. Changing this register affects the timer only at the

next start event.

Table 77. T0ReloadHi bits

9.7.2.2 T0ReloadLo

Low byte reload value of the Timer0.

Bit

7

6

5

4

3

2

1

0

Symbol

T0ReloadLo

Access

rights

r/w

Table 78. T0ReloadLo register (address 11h);

CLRC661

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3.7 — 23 June 2021

COMPANY PUBLIC

456937

69 / 152

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CLRC66103HN Datasheet(PDF) 69 Page - NXP Semiconductors

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