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CLRC661 Datasheet(PDF) 51 Page - NXP Semiconductors

Part # CLRC661
Description  High performance NFC frontend CLRC661 plus
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

CLRC661 Datasheet(HTML) 51 Page - NXP Semiconductors

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NXP Semiconductors
CLRC661
High performance NFC frontend CLRC661 plus
8.10.3.4 MFAuthent command
Command (03h), Parameter1 (Authentication command code 60h or 61h), Parameter2
(block address), Parameter3 (card serial number byte0), Parameter4 (card serial number
byte1), Parameter5 (card serial number byte2), Parameter6 (card serial number byte3);
This command handles the MIFARE Classic authentication in Reader/Writer mode to
ensure a secure communication to any MIFARE Classic card.
When the MFAuthent command is active, any FIFO access is blocked. Anyhow if there is
access to the FIFO, the bit WrErr in the Error register is set.
This command terminates automatically when the MIFARE Classic card is authenticated
and the bit MFCrypto1On is set to logic 1.
This command does not terminate automatically, when the card does not answer,
therefore the timer should be initialized to automatic mode. In this case, beside the bit
IdleIRQ the bit TimerIRQ can be used as termination criteria. During authentication
processing the bits RxIRQ and TxIRQ are blocked. The Crypto1On shows if the
authentication was successful. The Crypto1On is always valid.
In case, there is an error during authentication, the bit ProtocolErr in the Error register is
set to logic 1 and the bit Crypto1On in register Status2Reg is set to logic 0.
8.10.3.5 AckReq command
Command (04h);
Performs a Query (Full command must be written into the FIFO); an Ack and a ReqRn
command. All answers to the command will be written into the FIFO. The error flag is
copied after the answer into the FIFO.
This command terminates automatically and the then active state is idle.
8.10.3.6 Receive command
Command (05h);
The CLRC661 activates the receiver path and waits for any data stream to be received,
according to its register settings. The registers must be set before starting this command
according to the used protocol and antenna configuration. The correct settings have to be
chosen before starting the command.
This command terminates automatically when the received data stream ends. This
is indicated either by the end of frame pattern or by the length byte depending on the
selected framing and speed.
Remark: If the bit RxMultiple in the RxModeReg register is set to logic 1, the Receive
command does not terminate automatically. It has to be terminated by activating any
other command in the CommandReg register (see Section 9.8.1).
8.10.3.7 Transmit command
Command (06h); data to transmit
The content of the FIFO is transmitted immediately after starting the command. Before
transmitting the FIFO, all relevant registers have to be set to transmit data.
This command terminates automatically when the FIFO gets empty. It can be terminated
by any other command written to the command register.
CLRC661
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 3.7 — 23 June 2021
COMPANY PUBLIC
456937
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