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ICS162834AG-T Datasheet(PDF) 4 Page - Integrated Circuit Systems |
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ICS162834AG-T Datasheet(HTML) 4 Page - Integrated Circuit Systems |
4 / 7 page 4 ICS162834 Advance Information 0774—02/10/03 Electrical Characteristics - DC TA = 0 - 70° C; VDD = 3.3 ± 0.3V, VDDQ=3.3 ± 0.3V; (unless otherwise stated) SYMBOL PARAMETERS CONDITIONS VDD (V) MIN TYP MAX UNITS VIH HIGH-level input voltage 3.0 - 3.6 2.0 V VIL LOW-level input voltage 3.0 - 3.6 0.8 V VOH HIGH-level output voltage IOH = -12 mA, VIH = 2.0V 3.0 2.2 V VOL Low-level output voltage IOL = 12 mA, VIL = 0.8V 3.0 0.8 II Input leakage current VI = VDD or GND 3.0 - 3.6 ±10 µA IOZ Off-state leakage current VO = VDD or GND#, OE = VDD ±20 µA IDD Quiescent Supply Current VI = VDD or GND, IO = 0 ±40 µA * Parameters are characterized over recommended operating conditions. Critical Register Specifications* SYMBOL PARAMETERS CONDITION VDD (V) MIN TYP MAX UNITS tPD** Propagation Delay (CK to Y) RL = 500 Ω, CL = 50 pF 3.0 - 3.6 1.4 3.5 ns tPD** Propagation Delay (CK to Y) RL = 500 Ω, CL = 30 pF 3.0 - 3.6 0.7 2.5 ns tS Setup time (A before CK) 3.0 - 3.6 1.0 ns tH Hold time (A after CK) 3.0 - 3.6 0.6 ns CI Clock input capacitance 3.0 - 3.6 3.3 4.0 6.0 pF * Parameters are characterized over recommended operating conditions. ** The tPD value in this table would equate to the 'Time-to-Vm' delay described in the post register timing specifications of the PC133 registered DIMM Specification. The first value applies to DIMMs with nine SDRAM loads per register output, and the second to DIMMs with eighteen SDRAM loads per register output. These values should serve as only an initial starting point, |
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