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PLL502-11SSC Datasheet(PDF) 4 Page - PhaseLink Corporation |
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PLL502-11SSC Datasheet(HTML) 4 Page - PhaseLink Corporation |
4 / 6 page Preliminary PLL502-11 96MHz – 200MHz Low Phase Noise PECL VCXO (12 – 25MHz Crystals) 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 7/15/02 Page 4 5. Jitter and Phase Noise specification PARAMETERS CONDITIONS MIN. TYP. MAX. UNITS Period jitter RMS at 155MHz With capacitive decoupling between VDD and GND. 9 ps Accumulated jitter RMS at 155MHz With capacitive decoupling between VDD and GND. Over 10,000 cycles. TBM ps Integrated jitter RMS at 155MHz Integrated 12 kHz to 20 MHz 3 4 ps Phase Noise relative to carrier 155MHz @10Hz offset -60 dBc/Hz Phase Noise relative to carrier 155MHz @100Hz offset -90 dBc/Hz Phase Noise relative to carrier 155MHz @1kHz offset -112 dBc/Hz Phase Noise relative to carrier 155MHz @10kHz offset -125 dBc/Hz Phase Noise relative to carrier 155MHz @100kHz offset -123 dBc/Hz Note: Phase Noise measured at VIN = 0V |
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