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PLL701-26 Datasheet(PDF) 3 Page - PhaseLink Corporation |
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PLL701-26 Datasheet(HTML) 3 Page - PhaseLink Corporation |
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3 / 4 page  PLL701-26 Low EMI Spread Spectrum Multiplier Clock 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 08/12/04 Page 3 3. Timing Characteristics PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Input Frequency FIN 33 90 MHz Rise Time Tr Measured at 0.8V ~ 2.0V @ 3.3V 0.8 0.95 1.1 ns Fall Time Tf Measured at 2.0V ~ 0.8V @ 3.3V 0.78 0.85 0.9 ns Output Duty Cycle DT 45 50 55 % Input to Output Delay 2 4 ns Cycle to Cycle Jitter Tcyc-cyc Over output frequency range @ 3.3V 100 ps |
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