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PLL702-06SCL Datasheet(PDF) 1 Page - PhaseLink Corporation |
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PLL702-06SCL Datasheet(HTML) 1 Page - PhaseLink Corporation |
1 / 8 page PLL702-06 Clock Generator for Printer Applications 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 10/26/05 Page 1 ^: Internal pull-up resistor *: Bi-directional pin T: Tri-level Input 1 2 3 4 5 6 7 8 XIN XOUT VDDA VDDD GNDUSB VDDUSB USB/USB_SELT* VDDCPU Note : FS0T FS1T SS0^ SS1^ GNDA GNDD GNDCPU CPU 16 15 14 13 12 11 10 9 FEATURES • 1 CPU Clock output with selectable frequencies (50, 66.67, 75, 80, 83.3, 90, 100,125 or 133 MHz). • 1 Selectable 48, 30 or 12MHz USB Clock output. • Selectable Spread Spectrum (SST) for EMI reduction on CPU clock. • PowerPC compatible CPU Clock. • Advanced, low power, sub-micron CMOS processes. • 14.31818MHz fundamental crystal input. • 3.3V and/or 2.5V operation. • Available in 16-Pin 150mil SOP. DESCRIPTION The PLL702-06 is a low cost, low jitter, and high performance clock synthesizer for generic Printer applications. It provides one CPU clock and a selectable 48, 30 or 12MHz (USB) output. The user can choose among 9 different clock frequencies and 3-selectable down- spread Spread Spectrum modulation to reduce EMI on CPU clock. All frequencies are generated from a single low cost 14.31818MHz crystal. CPU clock can be driven from an independent 2.5V or 3.3V power supply. PIN CONFIGURATION CPU CLOCK FREQUENCY TABLE FS1 FS0 CPU (MHz) 0 0 50 0 M 66.67 0 1 75 M 0 80 M M 83.33 M 1 90* 1 0 100 1 M 125 1 1 133* BLOCK DIAGRAM XTAL OSC XIN XOUT SS(0:1) PLL SST Control Logic PLL Control Logic USB_SEL FS(0:1) VDDUSB USB VDDCPU CPU *Notes: Actual CPU frequency for 90Mhz is 88.88Mhz, 133Mhz is 130.9Mhz |
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