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PLL650-04 Datasheet(PDF) 1 Page - PhaseLink Corporation

Part No. PLL650-04
Description  Low EMI Clock for 10/100 PHY and Gigabit Ethernet
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Maker  PLL [PhaseLink Corporation]
Homepage  http://www.phaselink.com
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PLL650-04 Datasheet(HTML) 1 Page - PhaseLink Corporation

   
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Preliminary
PLL650-04
Low EMI Clock for 10/100 PHY and Gigabit Ethernet
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 05/31/05 Page 1
FEATURES
• Full CMOS output swing with 25-mA output drive
capability at TTL level.
• Advanced, low power, sub-micron CMOS processes.
• 25 MHz fundamental crystal or clock input.
• Low jitter (< 80ps cycle-to-cycle)
• 25 MHz and 50 MHz outputs
• Five CLKOUT selectable between 90, 100, 125, 133,
145 and 150 MHz.
• SSTE (SST Enable) Low EMI selector for CLKOUT.
• Output enable functionality.
• Zero PPM synthesis error in all clocks.
• Ideal for Network switches.
• 3.3V operation.
Available in 20-Pin 150mil SSOP.
DESCRIPTION
The PLL650-04 is a low cost, low jitter, and high
performance clock synthesizer. With PhaseLink proprietary
analog Phase Locked Loop techniques, the chip accepts
25.0 MHz crystal, and produces multiple output clocks for
networking chips. A CLKOUT signal of selectable
frequency (25MHz, 48MHz, 50MHz, 90MHz, 100MHz,
125MHz, 133MHz, 145MHz or 150 MHz) is available at 5
output pins. Through an SST enable (SSTE) selector, the
CLKOUT signal can be modulated to reduce EMI through
Spread Spectrum Technology. Output enable selectors are
available to enable/disable the output signals.
PIN CONFIGURATION
SELECTION TABLE
FS1
FS0
CLKOUT
SSTE
SST
MODULATION
0
0
90 MHz
0
±0.25% Center
0
M
100 MHz
1
OFF
0
1
125 MHz
1
0
133 MHz
1
M
145 MHz
1
1
150 MHz
Tri-level input pins: 0 = connect to GND
M= not connected, 1 = connect to VDD
BLOCK DIAGRAM
1
2
3
4
5
6
7
8
13
14
15
16
17
18
19
20
VDD
50M_EN^
25MHz/25M_EN*^
GND
50MHz
GND
CLKOUTº
FS0
XIN
XOUT/SSTE*^
GND
VDD
CLKOUT_EN^
VDD
CLKOUTº
CLKOUTº
Note: ^: Internal pull-up resistor *: Bi-directional pin º: Low EMI output
9
10
11
12
CLKOUTº
GND
FS1^
CLKOUTº
XTAL
OSC
25MHz
XIN
XOUT
50MHz
CLKOUT (90 100, 125, 133,
145 or 150 MHz)
Control
Logic
FS (0:1)
1
1
5
SSTE
(SST enable)
50M_EN (enable)
25M_EN (enable)
CLKOUT_EN (enable)


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