PLL602-35/-37/-38/-39

750kHz – 800MHz Low Phase Noise Multiplier XO

Universal Low Phase Noise IC’s

47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/28/05 Page 6

9. PECL Electrical Characteristics

PARAMETERS

SYMBOL

CONDITIONS

MIN.

MAX.

UNITS

Output High Voltage

V

Output Low Voltage

(see figure)

V

10. PECL Switching Characteristics

PARAMETERS

SYMBOL

CONDITIONS

MIN.

TYP.

MAX.

UNITS

Clock Rise Time

0.8V ~ 2.0V

1.5

ns

Clock Fall Time

2.0V ~ 0.8V

1.5

ns

Duty Cycle

Measured @ 1.4V

40

50

60

%

OUT

OUT

50

Ω

50

Ω

PECL Levels Test Circuit

PECL Transistion Time Waveform

OUT

OUT

50%

20%

80%

t

R

t

F

VDD

DUTY CYCLE

45 - 55%

55 - 45%

50%

OUT

OUT

t

SKEW

PECL Output Skew

2.0V