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PRELIMINARY
CY7C1339G
Document #: 38-05520 Rev. *A
Page 9 of 17
Shaded area contains advanced information.
Notes:
9. Overshoot: VIH(AC) < VDD +1.5V (Pulse width less than tCYC/2), undershoot: VIL(AC) > -2V (Pulse width less than tCYC/2).
10. TPower-up: Assumes a linear ramp from 0v to VDD(min.) within 200ms. During this time VIH < VDD and VDDQ < VDD.
Thermal Resistance[11]
Parameter
Description
Test Conditions
TQFP
Package
BGA
Package
Unit
Θ
JA
Thermal Resistance
(Junction to Ambient)
Test conditions follow standard test
methods and procedures for
measuring thermal impedance, per
EIA / JESD51.
TBD
TBD
°C/W
Θ
JC
Thermal Resistance
(Junction to Case)
TBD
TBD
°C/W
Capacitance[11]
Parameter
Description
Test Conditions
TQFP
Package
BGA
Package
Unit
CIN
Input Capacitance
TA = 25°C, f = 1 MHz,
VDD = 3.3V.
VDDQ = 3.3V
55
pF
CCLK
Clock Input Capacitance
5
5
pF
CI/O
Input/Output Capacitance
5
7
pF
Electrical Characteristics Over the Operating Range (continued)[9, 10]
Parameter
Description
Test Conditions
Min.
Max.
Unit
AC Test Loads and Waveforms
Note:
11. Tested initially and after any design or process change that may affect these parameters
OUTPUT
R = 317
Ω
R = 351
Ω
5pF
INCLUDING
JIG AND
SCOPE
(a)
(b)
OUTPUT
RL = 50Ω
Z0 = 50Ω
VT = 1.5V
3.3V
ALL INPUT PULSES
VDDQ
GND
90%
10%
90%
10%
≤ 1ns
≤ 1ns
(c)
OUTPUT
R = 1667
Ω
R =1538
Ω
5pF
INCLUDING
JIG AND
SCOPE
(a)
(b)
OUTPUT
RL = 50Ω
Z0 = 50Ω
VT = 1.25V
2.5V
ALL INPUT PULSES
VDDQ
GND
90%
10%
90%
10%
≤ 1ns
≤ 1ns
(c)
3.3V I/O Test Load
2.5V I/O Test Load
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