Preliminary – TQ5638

Data Sheet

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Pin Descriptions:

Pin Name

Pin #

Description and Usage

Iset_PCS

1 Bias resistor for PCS LNA.

PLNA_IN

2 PCS LNA input. Requires a blocking capacitor, which may be used as part of the

input-matching network.

Vdd_LNA

3 Power supply pin for PCS and GPS LNAs. Bypass with a capacitor as close to the

pin as possible.

GLNA_IN

4 GPS LNA input. Requires LC match.

GPS_GND

5 GPS Ground.

Vdd_LO

6 Supply voltage for LO buffers.

GPS_LNA_OUT

7 GPS LNA output.

PLO_IN

8 PCS LO input.

GLO_IN

9 GPS LO input.

GND

10 Ground.

GPS_Mix_IN

11 GPS Mixer input.

PLO_OUT

12 PCS LO buffer output. Does not require a blocking capacitor.

GPS_Mix_OUT-

13 Negative GPS IF output.

GPS_Mix_OUT+

14 Positive GPS IF output.

Vcc_Mix

15 Supply voltage for all mixers.

MIX_GND

16 Mixer Ground.

PCDMA_OUT-

17 Negative CDMA output.

PCDMA_OUT+

18 Positive CDMA output.

Vdd_DIG

19 Supply voltage for Logic Control Circuits.

PM_IN

20 PCS Mixer RF input.

BUFFEN

21 LO output buffer enable. Set BUFFEN pin HIGH to power up the PCS LO buffer

output.

LIN/GPS

22 Logic input for high or low linearity. Logic HIGH selects High Linearity.

PCS_ON

23 Power on for PCS. Logic HIGH selects PCS Band.

PLNA_OUT

24 PCS LNA output. Requires a pull-up inductor to Vcc and a series blocking capacitor,

which can be used as part of the output-matching network.