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OR3T20-5S240 Datasheet(PDF) 22 Page - Agere Systems |
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OR3T20-5S240 Datasheet(HTML) 22 Page - Agere Systems |
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22 / 210 page  22 22 Lucent Technologies Inc. Data Sheet June 1999 ORCA Series 3C and 3T FPGAs Programmable Logic Cells (continued) Figure 11. SLIC All Modes Diagram Figure 12. Buffer Mode 5-5744(F) BRI9 I9 BLI9 BRI8 I8 BLI8 BRI7 I7 BLI7 BRI6 I6 BLI6 BRI5 I5 BLI5 BRI4 I4 BLI4 BRI3 I3 BLI3 BRI2 I2 BLI2 BRI1 I1 BLI1 BRI0 I0 BLI0 BL09 BR09 BL08 BR08 BL07 BR07 BL06 BR06 BL05 BR05 BL04 BR04 BL03 BR03 BL02 BR02 BL01 BR01 BL00 BR00 DEC DEC 0/1 0/1 TRI 0/1 0/1 HIGH Z WHEN LOW 5-5745(F) BRI9 I9 BLI9 BRI8 I8 BLI8 BRI7 I7 BLI7 BRI6 I6 BLI6 BRI5 I5 BLI5 BRI4 I4 BLI4 BRI3 I3 BLI3 BRI2 I2 BLI2 BRI1 I1 BLI1 BRI0 I0 BLI0 BL09 BR09 BL08 BR08 BL07 BR07 BL06 BR06 BL05 BR05 BL04 BR04 BL03 BR03 BL02 BR02 BL01 BR01 BL00 BR00 TRI 0/1 0/1 1 0 DEC THIS CAN BE USED A VHI OR VLO HIGH Z WHEN LOW TO GENERATE |
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