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NS32CG16-15 Datasheet(PDF) 6 Page - National Semiconductor (TI) |
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NS32CG16-15 Datasheet(HTML) 6 Page - National Semiconductor (TI) |
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6 / 82 page  10 Product Introduction The NS32CG16 is a high speed CMOS microprocessor in the Series 32000EP family The NS32CG16 is software-compatible with all other CPUs in the family The device incorporates all of the Series 32000 advanced architectural features with the exception of the virtual mem- ory capability Brief descriptions of the NS32CG16 features that are shared with other members of the family are provided be- low Powerful Addressing Modes Nine addressing modes available to all instructions are included to access data structures efficiently Data Types The architecture provides for numerous data types such as byte word doubleword and BCD which may be arranged into a wide variety of data structures Symmetric Instruction Set While avoiding special case instructions that compilers can’t use the Series 32000 fami- ly incorporates powerful instructions for control operations such as array indexing and external procedure calls which save considerable space and time for compiled code Memory-to-Memory Operations The Series 32000 CPUs represent two-address machines This means that each op- erand can be referenced by any one of the addressing modes provided This powerful memory-to-memory architecture permits memory locations to be treated as registers for all useful operations This is important for temporary operands as well as for context switching Large Uniform Addressing The NS32CG16 has 24-bit address pointers that can address up to 16 megabytes with- out any segmentation this addressing scheme provides flexible memory management without add-on expense Modular Software Support Any software package for the Series 32000 architecture can be developed independent of all other packages without regard to individual addressing In addition ROM code is totally relocatable and easy to access which allows a significant reduction in hardware and software cost Software Processor Concept The Series 32000 architec- ture allows future expansions of the instruction set that can be executed by special slave processors acting as exten- sions to the CPU This concept of slave processors is unique to the Series 32000 architecture It allows software compatibility even for future components because the slave hardware is transparent to the software With future ad- vances in semiconductor technology the slaves can be physically integrated on the CPU chip itself To summarize the architectural features cited above pro- vide three primary performance advantages and character- istics High-Level Language Support Easy Future Growth Path Application Flexibility 11 NS32CG16 SPECIAL FEATURES In addition to the above Series 32000 features the NS32CG16 provides features that make the device ex- tremely attractive for a wide range of applications where graphics support low chip count and low power consump- tion are required The most relevant of these features are the graphics sup- port capabilities that can be used in applications such as printers CRT terminals and other varieties of display sys- tems where text and graphics are to be handled Graphics support is provided by eighteen instructions that allow operations such as BITBLT data compressionexpan- sion fills and line drawing to be performed very efficiently In addition the device can be easily interfaced to an exter- nal BITBLT Processing Unit (BPU) for high BITBLT perform- ance The NS32CG16 allows systems to be built with a relatively small amount of random logic The bus is highly optimized to allow simple interfacing to a large variety of DRAMs and peripheral devices All the relevant bus access signals and clock signals are generated on-chip The cycle extension logic is also incorporated on-chip The device is fabricated in a low-power CMOS technology It also includes a power-save feature that allows the clock to be slowed down under software control thus minimizing the power consumption This feature can be used in those applications where power saving during periods of low per- formance demand is highly desirable The power save feature and the Bus Characteristics are described in the ‘‘Functional Description’’ section A general overview of BITBLT operations and a description of the graphics support instructions is provided in Section 25 De- tails on all the NS32CG16 instructions can be found in the NS32CG16 PrinterDisplay Processor Programmer’s Refer- ence Supplement 6 |
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