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LMX3160 Datasheet(PDF) 6 Page - National Semiconductor (TI) |
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LMX3160 Datasheet(HTML) 6 Page - National Semiconductor (TI) |
6 / 16 page Electrical Characteristics The following specifications are guaranteed over the recommended operating condi- tions unless otherwise specified (Continued) Symbol Parameter Conditions Min Typ Max Unit FREQUENCY SYNTHESIZER VOSC Oscillator Sensitivity 05 10 VPP IDo-source Charge Pump Output Current Vdo e VP 2 Icpo e LOW (Note 4) b 15 mA IDo-sink Vdo e VP 2 Icpo e LOW (Note 4) 15 mA IDo-source Vdo e VP 2 Icpo e HIGH (Note 4) b 60 mA IDo-sink Vdo e VP 2 Icpo e HIGH (Note 4) 60 mA IDo-Tri 05 s Vdo s VP b05 b 10 01 10 nA TA e 25 C VOH High-Level Output Voltage IOH eb10 mA VCC b04 V VOL Low-Level Output Voltage IOL e 10 mA 04 V VIH High-Level Input Voltage VCC b08 V VIL Low-Level Input Voltage 08 V IIN Input Current GND k VIN k VCC b 10 10 mA tCS Data to Clock Set Up Time See Data Input Timing 50 ns tCH Data to Clock Hold Time See Data Input Timing 10 ns tCWH Clock Pulse Width High See Data Input Timing 50 ns tCWL Clock Pulse Width Low See Data Input Timing 50 ns tES Clock to Load Enable Set Up Time See Data Input Timing 50 ns tEW Load Enable Pulse Width See Data Input Timing 50 ns DC COMPENSATION SAMPLE AND HOLD CIRCUIT VOS Input Offset Voltage 3mV VIO InputOutput Voltage Swing Centered at 15V 10 VPP RSH Sample and Hold Resistor 224 336 X DV Threshold Input Voltage Droop Chold e 2700 pF 1 10 mVms Note 1 This includes 5 mA current sourced from the Rx VREG pin for the external receive LNA as shown in the application diagram Note 2 This includes 5 mA current sourced from the Tx VREG pin for the external transmit buffer used before the power amplifier as shown in the application diagram Note 3 Measured at the output of external gain stage Note 4 See programmable modes for Icpo description 6 |
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Similar Description - LMX3160 |
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