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IDT59920-7SOI Datasheet(PDF) 3 Page - Integrated Device Technology |
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IDT59920-7SOI Datasheet(HTML) 3 Page - Integrated Device Technology |
3 / 6 page 3 COMMERCIALANDINDUSTRIALTEMPERATURERANGES IDT59920A LOW SKEW PLL CLOCK DRIVER TURBOCLOCK JR. RECOMMENDED OPERATING RANGE IDT59920A-5,-7 IDT59920A-2 (Industrial) (Commercial) Symbol Description Min. Max. Min. Max. Unit VDD Power Supply Voltage 4.5 5.5 4.75 5.25 V TA AmbientOperatingTemperature -40 +85 0 +70 °C POWER SUPPLY CHARACTERISTICS Symbol Parameter TestConditions(1) Typ. Max. Unit IDDQ Quiescent Power Supply Current VDD = Max., TEST = MID, REF = LOW, 10 40 mA GND/sOE = LOW, All outputs unloaded ∆IDD Power Supply Current per Input HIGH VDD = Max., VIN = 3.4V 0.4 1.5 mA IDDD Dynamic Power Supply Current per Output VDD = Max., CL = 0pF 100 160 µA/MHz ITOT Total Power Supply Current VDD = 5V, FREF = 25MHz, CL = 240pF(1) 53 — VDD = 5V, FREF = 33MHz, CL = 240pF(1) 63 — mA VDD = 5V, FREF = 66MHz, CL = 240pF(1) 117 — NOTE: 1. For eight outputs, each loaded with 30pF. DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Symbol Parameter Conditions Min. Max. Unit VIH Input HIGH Voltage Guaranteed Logic HIGH (REF, FB Inputs Only) VDD −1.35 — V VIL InputLOWVoltage Guaranteed Logic LOW (REF, FB Inputs Only) — 1.35 V VIHH Input HIGH Voltage(1) 3-Level Inputs Only VDD −1— V VIMM Input MID Voltage(1) 3-Level Inputs Only VDD/2 −0.5 VDD/2+0.5 V VILL InputLOWVoltage(1) 3-Level Inputs Only — 1 V IIN InputLeakageCurrent VIN = VDD or GND — ±5 µA (REF, FB Inputs Only) VDD = Max. VIN = VDD HIGH Level — ±200 I3 3-Level Input DC Current (TEST, FS) VIN = VDD/2 MID Level — ±50 µA VIN = GND LOW Level — ±200 IPU Input Pull-Up Current (VDDQ/PE) VDD = Max., VIN = GND — ±100 µA IPD Input Pull-Down Current (GND/sOE)VDD = Max., VIN = VDD — ±100 µA VOH Output HIGH Voltage VDD = Min., IOH = −16mA — — V VDD = Min., IOH = −40mA VDD −0.75 — VOL OutputLOWVoltage VDD = Min., IOL = 46mA — 0.45 V IOS OutputShortCircuitCurrent(2) VDD = Max., VO = GND — N/A mA NOTES: 1. These inputs are normally wired to VDD, GND, or unconnected. Internal termination resistors bias unconnected inputs to VDD/2. If these inputs are switched, the function and timing of the outputs may be glitched, and the PLL may require an additional tLOCK time before all datasheet limits are achieved. 2. Outputs are not to be shorted. |
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