Preliminary Product Information S16450EJ1V0PM00

4

3. PIN FUNCTIONS

(1/2)

Pin Symbol

Pin Name

I/O

Description

Driver

Output

The D/A converted 256-gray-scale analog voltage is output.

Display

data

(RSDS)

Input

The display data is input with a width of 12 bits by double edge, viz., the gray scale

data (8 bits) by 3 dots (1 pixel).

R,/L

(CMOS)

Shift direction

control

Input

These refer to the start pulse input/output pins when driver ICs are connected in

cascade. The shift directions of the shift registers are as follows.

STHR

(CMOS)

Right shift start

pulse

I/O

STHL

(CMOS)

Left shift start

I/O

CLKP,

CLKN

(RSDS)

Shift clock

Input

Refers to the shift register’s shift clock input. The display data is incorporated into

the data register at both of rising and falling edge.

At the falling edge of the 160th clock after the start pulse input, the start pulse

output reaches the high level, thus becoming the start pulse of the next-level driver.

STB

(CMOS)

Latch

Input

The contents of the data register are transferred to the latch circuit at the rising

edge. And the output timing and output short function are controlled by MODE1 to

MODE3. Please refer to 8. RELATIONSHIP BETWEEN STB, POL, MODE1 to

MODE3 AND OUTPUT WAVEFORM for more detail. It is necessary to ensure

input of one pulse per horizontal period.

POL

(CMOS)

Polarity

Input

INV

(CMOS)

Data inversion

Input

Data inversion can invert when display data is loaded.

Please input DC signal. For details, refer to 6. DATA INVERSION.

LPC

Low power control

Input

LPC = L or open: Normal mode (default)

LPC = H: Low power mode (35% lower than noamal mode)

This pin controls the output short function.

MODE1

MODE2

MODE3

Output Short

Remark

H or open

X

X

Non-active

Output short circuit OFF

H or open

X

Active

During STB = H

H or open

H or open

During 34 CLK after STB falling

L

L

L

L

During 68 CLK after STB falling

MODE1 to

MODE3

Output short contro

Input

Remark X: H or L

Output short function works only when POL signal is changed from previous line.