Data Sheet S16316EJ2V0DS

4

4. PIN FUNCTIONS

(1/2)

Pin Symbol

Pin Name

I/O

Description

Driver

Output

The D/A converted 256-gray-scale analog voltage is output.

D0A, D0B

D1A, D1B

D2A, D2B

D3A, D3B

Gray scale data

Input

(mini-LVDS)

Display data with gray-scale data (8-bit) and control signal (RST = reset).

Refer to Table 4

−1.

CLKA,

CLKB

Shift clock

Input

(mini-LVDS)

Shift clock.

Refer to Table 4

−1.

R,/L

Shift direction

control

Input

(CMOS)

The shift direction control pin of shift register. The shift directions of the shift

registers are as follows.

STHR

Right shift start

pulse

STHL

Left shift start pulse

I/O

(CMOS)

This is the start pulse I/O pin when connected in cascade. Loading of display data

starts when a high level is read.

For right shift, STHR is input and STHL is output.

For left shift, STHL is input and STHR is output.

STB

Latch

Input

(CMOS)

Change the input mode, latched the registered data and transfer to DAC at the

rising edge. And supplied voltage to LCD pixel is output at falling edge.

POL

Polarity

Input

(CMOS)

Control the polarity of the output.

edge.

Refer to Table 4

−3.

SB

Bus-line set-back

Input

(CMOS)

Change the data order of mini-LVDS input.

Refer to Table 4

−1.

Input “L” level to this pin.

RxBIAS1,

RxBIAS2

mini-LVDS receiver

bias voltage control

Input

(CMOS)

This pin controls the bias current of mini-LVDS receiver circuit. Please refer to the

following table.

Number of output

pins select pin

Input

(CMOS)

This pin selects the number of output pins.

SRC

Slew-rate control

Input

(CMOS)

SRC = H: High-slew-rate mode (large current consumption)

SRC = L: Low-slew-rate mode (small current consumption)

ORC

Output resistance

control

Input

(CMOS)

ORC = H: Low output resistance mode

ORC = L: High output resistance mode

MODE

Output reset control

Input

(CMOS)

MODE = H: Output reset

MODE = L: No output reset

RxBIAS1

RxBIAS2

L

L

L

H

H

L

H

H