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EP1C12F100I7 Datasheet(PDF) 89 Page - Altera Corporation

Part # EP1C12F100I7
Description  Cyclone FPGA Family
Download  94 Pages
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Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation

EP1C12F100I7 Datasheet(HTML) 89 Page - Altera Corporation

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Preliminary Information
Cyclone FPGA Family Data Sheet
2.5-V LVTTL
2 mA
3,643
4,006
4,370
ps
8 mA
2,446
2,690
2,934
ps
12 mA
2,477
2,724
2,971
ps
16 mA
2,334
2,566
2,800
ps
1.8-V LVTTL
2 mA
6,606
7,267
7,927
ps
8 mA
5,112
5,623
6,134
ps
12 mA
4,862
5,348
5,834
ps
1.5-V LVTTL
2 mA
8,380
9,218
10,055
ps
4 mA
7,437
8,180
8,923
ps
8 mA
6,888
7,576
8,264
ps
SSTL-3 class I
1,799
1,979
2,158
ps
SSTL-3 class II
1,363
1,499
1,635
ps
SSTL-2 class I
2,115
2,326
2,537
ps
SSTL-2 class II
1,820
2,001
2,183
ps
LVDS
1,330
1,463
1,595
ps
Table 64. Cyclone I/O Standard Output Delay Adders for Slow Slew Rate on Row Pins (Part 1 of 2)
I/O Standard
-6 Speed Grade
-7 Speed Grade
-8 Speed Grade
Unit
Min
Max
Min
Max
Min
Max
LVCMOS
2 mA
2,288
2,517
2,745
ps
4 mA
1,784
1,962
2,140
ps
8 mA
1,320
1,452
1,583
ps
12 mA
1,183
1,301
1,419
ps
3.3-V LVTTL
4 mA
2,760
3,036
3,312
ps
8 mA
2,395
2,634
2,874
ps
12 mA
1,785
1,963
2,142
ps
16 mA
1,833
2,016
2,199
ps
24 mA
1,655
1,820
1,986
ps
2.5-V LVTTL
2 mA
3,643
4,006
4,370
ps
8 mA
2,446
2,690
2,934
ps
12 mA
2,477
2,724
2,971
ps
16 mA
2,334
2,566
2,800
ps
Table 63. Cyclone I/O Standard Output Delay Adders for Slow Slew Rate on Column Pins (Part 2 of 2)
I/O Standard
-6 Speed Grade
-7 Speed Grade
-8 Speed Grade
Unit
Min
Max
Min
Max
Min
Max


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