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M5125 Datasheet(PDF) 47 Page - List of Unclassifed Manufacturers

Part # M5125
Description  Mega I/O Controller with Plug & Play
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Manufacturer  ETC1 [List of Unclassifed Manufacturers]
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M5125 Datasheet(HTML) 47 Page - List of Unclassifed Manufacturers

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Acer Laboratories Inc.
--Preliminary, Confidential, Proprietary--
M512x : Mega I/O Controller with PnP
07-02-1997 Document Number: 512xDS02.doc
Page 47
Acer Labs: 7F, 115 Tung Hsing Street, Taipei 110, Taiwan, R.O.C. Tel: 886-(02) 762-8800
Fax: 762-6060
4.6 Command Description
4.6.1 Read Data
The read data op-code is written to the data register
followed by 8 bytes as specified in the command description
table.
After the last byte is written, the controller starts
looking for the correct sector header. Once the controller is
found, the controller sends data to the CPU.
After one
sector is finished, the sector number is incremented by one
and this new sector is searched for. If MT (multi-track) is
set, both sides of one track can be read. Starting on side
zero, the sectors are read until the sector number specified
by end of track sector number is reached. Then, side one is
read by starting with sector number one.
In DMA mode, the read-data command continues to read
until the TC pin is set. This means that the DMA controller
should be programmed to transfer the correct number of
bytes. TC should be controlled by the CPU and be asserted
when enough bytes are received.
An alternative to these
methods of stopping the read-data command is to program
the end of track sector number as the last sector number
that to be read. The controller stops reading the disk with
an error message indicating that it tried to access a sector
number beyond the end of the track.
The number of data bytes per sector parameter is defined in
Table 4-27. If this is set to zero, the data length parameter
defines the number of bytes that the controller transfers to
the CPU. If the data length specified is smaller than 128,
the controller still reads the entire 128 byte sector and
checks the CRC, though only the number of bytes specified
by the data length parameter are transferred to the CPU.
Data length parameter should not be set to zero.
If the
number of bytes per sector parameter is not zero, the data
length parameter has no meaning and should be set to FFh.
Table 4-27
Sector Size Selection
Bytes/Sector
Number of Bytes
Code
in Data Field
0
128
1
256
2
512
3
1024
4
2048
5
4096
6
8192
If the implied seek mode is enabled by both the mode
command and the IPS bit in this command, a seek is
performed to the track number specified in the command
phase. The controller also waits for the head-settle-time if
the implied seek is enabled. After all these conditions are
met, the controller searches for the specified sector by
comparing the track number, head number, sector number,
and number of bytes/sector given in the command phase
with the appropriate bytes read off the disk in the address
fields.
If the correct sector is found, but there is a CRC error in the
address field, bit 5 of ST1 (CRC error) is set and an
abnormal termination is indicated.
If the correct sector is
not found, bit 2 of ST1 (no data) is set and an abnormal
termination is indicated. In addition to this, if any address
field track number is FF, bit 1 of ST2 (bad track) is set or, if
any address field track number is different from that
specified in the command phase, bit 4 of ST2 (wrong track)
is set.
After finding the correct sector, the controller reads that data
field. If a deleted data mark is found and the SK bit is set,
the sector is not read, bit 6 of ST2 (control mark) is set, and
the next sector is searched for. If a deleted data mark is
found and the SK bit is not set, the sector is read, bit 6 of
ST2 (control mark) is set, and the read terminates with a
normal termination. If a CRC error is detected in the data
field, bit 5 is set to both ST1 and ST2 (CRC error) and an
abnormal termination is indicated.
If no problems occur in the read command, the read
continues from one sector to the next in logical order (not
physical order) until either TC is set or an error occurs. If a
disk has not been inserted into the disk drive, there are
many opportunities for the controller to hang. It does this if
it is waiting for a certain number of disk revolutions. If this
occurs, the controller can be forced to abort the command
by writing a byte to the data register.
An interrupt is generated when an execution phase of the
read data command terminates.
Table 4-28 shows the
values that are read back in the result phase. If an error
occurs, the result bytes indicate the sector being read when
the error occurred.


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