 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
TMS626812B Datasheet(PDF) 9 Page - Texas Instruments |
|
||||||||||||||||||||||||||||||
TMS626812B Datasheet(HTML) 9 Page - Texas Instruments |
|
|
9 / 40 page  TMS626812B 1 048 576 BY 8-BIT BY 2-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES SMOS693A – OCTOBER 1997 – REVISED APRIL 1998 9 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 CLK suspend / power-down mode (continued) as a CLK-suspend operation and its execution indicates a HOLD command. The device resumes operation from the point where it was placed in suspension, beginning with the second rising edge of CLK after CKE returns high. If CKE is brought low when no read or write command is in progress, the device enters power-down mode. If both banks are deactivated when power-down mode is entered, power consumption is reduced to a minimum. Power-down mode can be used during row-active or auto-refresh periods to reduce input buffer power. After power-down mode is entered, no further inputs are accepted until CKE returns high. To ensure that data in the device remains valid during the power-down mode, the self-refresh command ( SLFR ) must be executed concurrently with the power-down entry ( PDE ) command. When exiting power-down mode, new commands can be entered on the first CLK edge after CKE returns high, provided that the setup time (tCESP) is satisfied. Table 2 shows the command configuration for a CLK suspend / power-down operation. Figure 17, Figure 18, and Figure 31 show examples of the procedure. setting the mode register The ’626812B contains a mode register that must be programmed with the CAS latency, the burst type, and the burst length. This is accomplished by executing a mode-register set (MRS) command with the information entered on address lines A0 – A9. A logic 0 must be entered on A7 and A8, but A10 and A11 are don’t-care entries for the ’626812B. When A9 = 1, the write-burst length is always 1. When A9 = 0, the write-burst length is defined by A0 – A2. Figure 1 shows the valid combinations for a successful MRS command. Only valid addresses allow the mode register to be changed. If the addresses are not valid, the previous contents of the mode register remain unaffected. The MRS command is executed by holding RAS, CAS, and W low, and the input-mode word valid on A0 – A9 on the rising edge of CLK (see Table 1). The MRS command can be executed only when both banks are deactivated. A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 Reserved 0 = Serial 1 = Interleave (burst type) 0 0 REGISTER BIT WRITE-BURST REGISTER BITS† CAS REGISTER BITS§ BURST REGISTER BIT A9 WRITE BURST LENGTH A6 A5 A4 CAS LATENCY‡ A2 A1 A0 BURST LENGTH 0 1 A2 – A0 1 0 0 1 1 0 1 2 3 0 0 0 0 0 0 1 1 0 1 0 1 1 2 4 8 † All other combinations are reserved. ‡ Refer to timing requirements for minimum valid-read latencies based on maximum frequency rating. § All other combinations are reserved. Figure 1. Mode-Register Programming |
Similar Part No. - TMS626812B |
|
Similar Description - TMS626812B |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
allmanual.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
