Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

TMS626812B Datasheet(PDF) 6 Page - Texas Instruments

Part No. TMS626812B
Description  1,048,576 BY 8-BIT BY 2-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES
Download  40 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS626812B Datasheet(HTML) 6 Page - Texas Instruments

Back Button TMS626812B Datasheet HTML 2Page - Texas Instruments TMS626812B Datasheet HTML 3Page - Texas Instruments TMS626812B Datasheet HTML 4Page - Texas Instruments TMS626812B Datasheet HTML 5Page - Texas Instruments TMS626812B Datasheet HTML 6Page - Texas Instruments TMS626812B Datasheet HTML 7Page - Texas Instruments TMS626812B Datasheet HTML 8Page - Texas Instruments TMS626812B Datasheet HTML 9Page - Texas Instruments TMS626812B Datasheet HTML 10Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 40 page
background image
TMS626812B
1 048 576 BY 8-BIT BY 2-BANK
SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES
SMOS693A – OCTOBER 1997 – REVISED APRIL 1998
6
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
burst sequence
All data for the ’626812B are written or read in a burst fashion — that is, a single starting address is entered
into the device and the ’626812B internally accesses a sequence of locations based on that starting address.
After the first access, some subsequent accesses can be at preceding, as well as succeeding, column
addresses, depending on the starting address entered. This sequence can be programmed to follow either a
serial burst or an interleave burst (see Table 4, Table 5, and Table 6). The length of the burst can be programmed
to be 1, 2, 4, or 8 accesses (see the section on setting the mode register). After a read burst is complete (as
determined by the programmed burst length), the outputs are in the high-impedance state until the next read
access is initiated.
Table 4. 2-Bit Burst Sequences
INTERNAL COLUMN ADDRESS A0
DECIMAL
BINARY
START
2ND
START
2ND
Serial
0
1
0
1
Serial
1
0
1
0
Interleave
0
1
0
1
Interleave
1
0
1
0
Table 5. 4-Bit Burst Sequences
INTERNAL COLUMN ADDRESS A0 – A1
DECIMAL
BINARY
START
2ND
3RD
4TH
START
2ND
3RD
4TH
0
1
2
3
00
01
10
11
Serial
1
2
3
0
01
10
11
00
Serial
2
3
0
1
10
11
00
01
3
0
1
2
11
00
01
10
0
1
2
3
00
01
10
11
Interleave
1
0
3
2
01
00
11
10
Interleave
2
3
0
1
10
11
00
01
3
2
1
0
11
10
01
00


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38  39  40 


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn