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TMS626812B Datasheet(PDF) 5 Page - Texas Instruments

Part No. TMS626812B
Description  1,048,576 BY 8-BIT BY 2-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
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TMS626812B Datasheet(HTML) 5 Page - Texas Instruments

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TMS626812B
1 048 576 BY 8-BIT BY 2-BANK
SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES
SMOS693A – OCTOBER 1997 – REVISED APRIL 1998
5
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
operation (continued)
Table 3. Data-Mask (DQM) Command Function Table
COMMAND‡
STATE OF BANK(S)
DQM
(n)
DATA IN
(n)
DATA OUT
(n+2)
MNEMONIC
T = deac
and
B = deac
X
N/A
Hi-Z
T = actv
and
B = actv
( no access operation )§
X
N/A
Hi-Z
Data-in enable
T = write
or
B = write
L
V
N/A
ENBL
Data-in mask
T = write
or
B = write
H
M
N/A
MASK
Data-out enable
T = read
or
B = read
L
N/A
V
ENBL
Data-out mask
T = read
or
B = read
H
N/A
Hi-Z
MASK
† For exception of these commands on cycle n, one of the following must be true:
– CKE(n–1) must be high.
– tCESP must be satisfied for power-down exit.
– tCESP and tRC must be satisfied for self-refresh exit.
– tIS and nCLE must be satisfied for clock-suspend exit.
CS(n), RAS(n), CAS(n), W(n), and A0 – A11(n) are don’t care except for interrupt conditions.
‡ All other unlisted commands are considered vendor-reserved commands or illegal commands.
§ A bank is no longer in an access operation one cycle after the last data-out cycle of a read operation, and two cycles after the last data-in cycle
of a write operation. Neither the PDE nor the HOLD command is allowed on the cycle immediately following the last data-in cycle of a write
operation.
Legend:
n
= CLK cycle number
L
= Logic low
H
= Logic high
Hi-Z
= High-impedance state
X
= Don’t care, either logic low or logic high
V
= Valid
M
= Masked input data
N /A
= Not applicable
T
= Bank T
B
= Bank B
actv
= Activated
deac = Deactivated
write = Activated and accepting data inputs on cycle n
read
= Activated and delivering data outputs on cycle (n + 2)


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