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TMS626162A Datasheet(PDF) 3 Page - Texas Instruments

Part No. TMS626162A
Description  524288 BY 16-BIT BY 2-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORY
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
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TMS626162A Datasheet(HTML) 3 Page - Texas Instruments

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TMS626162A
524288 BY 16-BIT BY 2-BANK
SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORY
SMOS692B – JULY 1997 – REVISED MARCH 1998
3
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
operation (continued)
Table 1. Basic Command Truth Table
COMMAND‡
STATE OF
BANK(S)
CS
RAS
CAS
W
A11
A10
A0 – A9
MNEMONIC
Mode register set
T = deac
B = deac
L
L
L
L
X
X
A0 –A6 = V
A8 – A7 = 0
A9 = V
MRS
Bank deactivate (precharge)
X
L
L
H
L
BS
L
X
DEAC
Deactivate all banks
X
L
L
H
L
X
H
X
DCAB
Bank activate/row-address entry
SB = deac
L
L
H
H
BS
V
V
ACTV
Column-address entry / write operation
SB = actv
L
H
L
L
BS
L
V
WRT
Column-address entry / write operation
with auto-deactivate
SB = actv
L
H
L
L
BS
H
V
WRT-P
Column-address entry/read operation
SB = actv
L
H
L
H
BS
L
V
READ
Column-address entry/read operation
with auto-deactivate
SB = actv
L
H
L
H
BS
H
V
READ-P
Burst stop
SB = actv
L
H
H
L
X
X
X
STOP
No operation
X
L
H
H
H
X
X
X
NOOP
Control-input inhibit / no operation
X
H
X
X
X
X
X
X
DESL
Auto refresh§
T = deac
B = deac
L
L
L
H
X
X
X
REFR
† For execution of these commands on cycle n, one of the following must be true:
– CKE (n–1) must be high
–tCESP must be satisfied for power-down exit
–tCESP and tRC must be satisfied for self-refresh exit
–tIS and nCLE must be satisfied for clock-suspend exit
DQMx(n) is a don’t care.
‡ All other unlisted commands are considered vendor-reserved commands or illegal commands.
§ Auto-refresh or self-refresh entry requires that all banks be deactivated or in an idle state prior to the command entry.
Legend:
n
= CLK cycle number
L
= Logic low
H
= Logic high
X
= Don’t care, either logic low or logic high
V
= Valid
T
= Bank T
B
= Bank B
actv
= Activated
deac = Deactivated
BS
= Logic high to select bank T; logic low to select bank B
SB
= Bank selected by A11 at cycle n


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