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AT572D740 Datasheet(PDF) 2 Page - ATMEL Corporation

Part # AT572D740
Description  DIOPSIS 740 Dual Core DSP
Download  22 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT572D740 Datasheet(HTML) 2 Page - ATMEL Corporation

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AT572D740
7001AS–DPS–03/04
Description
DIOPSIS 740 is a Dual CPU Processor integrating a mAgic DSP and an ARM7TDMI™
RISC MCU, plus a total of 245 Kbytes SRAM. The system combines the flexibility of the
ARM7TDMI RISC controller with the very high performance of the DSP.
mAgic is a high performance VLIW DSP delivering 1 Giga floating-point operations per
second (GFLOPS) at a clock rate of 100 MHz. It has 512 data registers, 16 address reg-
isters, 10 independent operating units and 2 independent address generation units. For
instance, activating all the computing units, it can produce one complete FFT butterfly
per cycle. mAgic operates on 32-bit fixed-point and IEEE 754 40-bit extended precision
floating-point numeric format. It has also on-chip 17K x 40-bit data memory locations
and 8K x 128-bit program memory locations. Efficient usage of the internal program
memory is achieved through a code compression mechanism.
An optimizing assembler frees the user from the burden of dealing with the parallelism
of the processor resources and drastically simplifies the code development.
The ARM7TDMI™ embedded micro controller core is a member of the Advanced RISC
Machines (ARM
®) family of general purpose 32-bit microprocessors, which offer high
performance and very low power consumption. The ARM architecture is based on
Reduced Instruction Set Computer (RISC) principles, and the instruction set and the
related decode mechanism are much simpler than those of micro programmed Complex
Instruction Set Computers.
This simplicity results in a high instruction throughput and impressive real-time interrupt
response. The ARM7TDMI™ supports 16-bit Thumb® subset of the most commonly
used 32-bit instructions. These are expanded at run time with no degradation of system
performance. This gives 16-bit code density (saving memory area and cost) coupled
with 32-bit processor performance.
A rich set of peripheral and a 32 Kbytes internal memory provide a highly flexible and
integrated system solution.


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