SN74BCT2420

NuBus

™ ADDRESS/DATA TRANSCEIVERS AND REGISTERS

SDIS007A – D3159, NOVEMBER 1988 – REVISED JANUARY 1989

POST OFFICE BOX 655303

5

Terminal Functions

PIN NAME

DESCRIPTION

A15–A0

Address bus. This 16-bit I/O port is connected to the local board’s address bus. When information is transferred between this

port and the NuBus

t port (AD15–AD0), the data is inverted to conform to NuBust specifications.

ACLK

Address clock. This input saves the address portion of NuBus

t read or write cycles. Data present at the AD15–AD0 inputs

is clocked into the address register on the low-to-high transition of ACLK.

A/D

Address/data select. This input controls the address/data multiplexer. When A/D is driven low, the local address port, A15–A0,

is selected as input to the AD15–AD0 outputs. When A/D is taken high, the local data port, D15–D0, is selected as input to the

AD15–AD0 outputs.

AD15–AD0

Address/data port. This 16-bit active-low I/O port directly interfaces to the NuBus

t address/data lines. These lines are

multiplexed to carry address information at the beginning of a NuBus

t cycle and data information later in the cycle.

ADEN

Address/data output enable. This active-low input enables the AD15–AD0 outputs. When ADEN is taken high, the AD15–AD0

outputs are in the high impedance state, allowing input from the NuBus

t.

AEN

Address enable. This active-low input enables the local address outputs. A15–A0, to place data onto the local board. When

AEN is taken high, the A15–A0 outputs are in the high-impedance state, allowing input from the local address bus.

ALE

Address latch enable. This active-low input controls the latch that holds the address received from the local address bus,

A15–A0. When ALE is low, the latch is transparent. When ALE is taken high, the address present at the A15–A0 inputs is latched

and remains latched while ALE is held high.

D15–D0

Data bus. This 16-bit I/O port is connected to the local board’s data bus. When information is transferred between this port and

the NuBus

t port (AD15–AD0), the data is inverted to conform to NuBust specifications.

DCLK

Data clock. This input saves the data portion of NuBus

t write cycles. Data present at the AD15–AD0 inputs is clocked into

the data register on the low-to-high transition of DCLK.

DEN

Data enable. This active-low input enables the local data port outputs, D15–D0, to place data onto the local board. When DEN

is taken high, the D15–D0 outputs are in the high-impedance state, allowing input from the local board.

DLE

Data latch enable. This active-low input controls the latch that holds the data received from the local data bus, D15–D0. When

DLE is low, the latch is transparent. When DLE is taken high, the data present at the D15–D0 inputs is latched and remains

latched while DLE is held high.

ID3–ID0

Card-slot identification. These four inputs accept binary-coded location information for each NuBus

t slot position on the

backplane. These four lines are typically hard wired logic levels unique to each NuBus

t slot connector. For convenient

implementation, the inputs have internal 10-k

Ω pull up resistors that ensure the logic high level when the inputs are left open

circuited. The internal comparator uses these inputs to identify when the local hardware card is being accessed.

IDEQ

Identification equal. This active-low output is used to signal that the board is being accessed by the NuBus

t. IDEQ goes low

whenever AD15–AD12 are low and AD11–AD8 match ID3–ID0. Since the internal comparator uses data from the address

register, the address register must be clocked before the local board samples IDEQ. IDEQ is valid for the entire NuBus

t cycle

after ACLK.

SSEQ

Super-slot equal. This active-low output is used to signal the local board that super-slot addresses are being requested in the

super-slot mode. SSEQ goes low when AD15–AD12 match ID3–ID0 and ID3–ID0 are not all low. Since the internal comparator

uses data from the address register, the address register must be clocked before the local board samples SSEQ. SSEQ is valid

for the entire NuBus

t cycle after ACLK.