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CY23020-1
Document #: 38-07120 Rev. *B
Page 4 of 10
The CY23020-1 uses a differential input receiver to increase
it’s rejection of common mode input noise and thus increase
device performance. To ensure that any noise appears equally
on both the REF– and REF+ pins, it is necessary to match the
external impedance and circuitry seen at these pins. Figure 3
shows how this may be accomplished. The reference voltage,
VREF can be generated by a resistor divider from a power
supply. This potential will adjust the FBIN+ input’s triggering
threshold. The reference voltage should be well bypassed so
as to not introduce any single ended noise to the device. Note
that the impedance (50 ohms) is also matched to the FBIN+
line. The 50 ohm resistor is used to create a “like” load on the
REF– input clock signal and matches the 50-ohm source
impedance of the REF+ input signal. If the input impedance is
significantly different than 50 ohms, the reference resistor
should be adjusted accordingly.
Ref-
Ref+
FBOUT
Q1
Q19
Q18
Q17
.
.
.
Q10
Q2
.
.
.
Q9
FBIN-
FBIN+
RS
50
Ω
50
Ω
Vref Source
CL
CL
RS
Cbyp
Cbyp
Figure 3. Establishing Reference Voltages