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CY23020-1 Datasheet(PDF) 7 Page - Cypress Semiconductor

Part # CY23020-1
Description  20-output, 200-MHz Zero Delay Buffer
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY23020-1 Datasheet(HTML) 7 Page - Cypress Semiconductor

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CY23020-1
Document #: 38-07120 Rev. *B
Page 7 of 10
Full Swing AC Electrical Characteristics VDDC =3.3V ±5%, VDD = 2.5V ±5% or VDD = 3.3V ±5%,
Load: (See term. diagram, CL= 5 pf) QFN Package
Parameter
Description
Test Conditions
Min.
Typ.
Max.
Unit
FIN
Input Frequency
50
200
MHz
FOUT
Output Frequency
50
200
MHz
tISR
Input Slew Rate (+ or –)
Measured between 20% and 80% of input swing
1
6.5
V/ns
tR
Output Rise Rate
Measured between 20% and 80% of output swing
1
6.5
V/ns
tF
Output Fall Rate
Measured between 80% and 20% of output swing
1
6.5
V/ns
tIDC
Input Duty Cycle
Tested at 50% swing
40
60
%
tD
Output Duty Cycle
Measured at VDD/2
45
55
%
tPD
REF–FBIN skew
Fout = Fref, VDD = 2.5V
–175
175
ps
Fout = Fref, VDD = 3.3V
–100
175
tPD2
REF–FBIN skew
Fout = Frefx2, VDD = 2.5V
–175
175
ps
Fout = Frefx2, VDD = 3.3V
–150
175
tSK
Output-Output Skew
85
ps
tTB
Total Timing Budget window[3,4] Refin to any output, Fout = Fref
335
ps
All outputs active, Fout = Fref × 2385
ps
tJC
Peak Cycle-Cycle Jitter (1000
cycles max)
All outputs active, Fout = Fref
95
ps
tJC_RMS
RMS Cycle-Cycle Jitter
All outputs active, Fout = Fref
12
ps
tJP
Period Jitter p-p
All outputs active, Fout = Fref
95
ps
tJP_RMS
RMS Period Jitter
All outputs active, Fout = Fref
17
ps
tJL
I/O Phase Jitter p-p
All outputs active, Fout = Fref
170
ps
tJLRMS
RMS I/O Phase Jitter
All outputs active, Fout = Fref
22
ps
tJC2
Peak Cycle-Cycle Jitter (1000
cycles max)
All outputs active, Fout = Fref × 2145
ps
tJCRMS2
RMS Cycle-Cycle Jitter
All outputs active, Fout = Fref × 224
ps
tJP2
Period Jitter p-p
All outputs active, Fout = Fref × 2170
ps
tJPRMS2
RMS Period Jitter
All outputs active, Fout = Fref × 228
ps
tJL2
I/O Phase Jitter p-p
All outputs active, Fout = Fref × 2170
ps
tJLRMS2
RMS I/O Phase Jitter
All outputs active, Fout = Fref × 228
ps
PSRR
(Core)
I/O Phase Jitter Sensitivity to
Power Supply Variations
1Vpp modulation of 10 kHz–10MHz
300
pspp
/ V
PSRR
(Output)
I/O Phase Jitter Sensitivity to
Power Supply Variations
1Vpp modulation of 10 kHz–10MHz
700
pspp
/ V
tLOCK
Power-up lock time
1ms
tPWD
Power-down time
1ms
tTSK
Spread Spectrum Tracking
skew
100
ps


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