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STK18TA8 Datasheet(PDF) 2 Page - List of Unclassifed Manufacturers

Part No. STK18TA8
Description  nvTime Event Data Recorder Serial Peripheral Interface nvSRAM QuantumTrap CMOS Nonvolatile Static RAM
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Maker  ETC1 [List of Unclassifed Manufacturers]
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STK18TA8 Datasheet(HTML) 2 Page - List of Unclassifed Manufacturers

 
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STK18TA8
April 2005
Document Control #ML0028 rev 0.8
2
PACKAGES
PIN DESCRIPTIONS
Pin Name
I/O
Description
SI - Serial Input
Input
The SI pin is used to transfer data into the device. Data is latched from this pin on the rising
edge of the SCK clock pin. Instructions, addresses and data are all transmitted over this pin.
SO - Serial Output
3-state Output
The SO pin is used to transfer data out of the STK18TA8. During a read cycle, data is shifted out
on this pin after the falling edge of the serial clock.
CS
- Chip Select
Input
A low level on this pin selects the device. A falling edge is required on CS before each
command code. Nonvolatile operations which are already in progress will be completed
regardless of the CS input signal. When the device is deselected, SO goes to the high
impedance state allowing other devices to share the SPI bus. When CS is held high and all
internal commands have completed the device enters the standby mode (low-power).
SCK - Serial Clock
Input
The SCK is used to synchronize the communication between a master and the STK18TA8.
Instructions, addresses, or data present on the SI pin are latched on the rising edge of the clock
input, while data placed on the SO pin changes on the falling edge of the clock input.
HOLD
Input
The HOLD pin is used to pause the serial interface. If HOLD
is driven low, the chip ignores
all serial input as long as CS
is held low. When HOLD
is again driven high, normal
operation resumes on the next clock edge. If CS
is driven high at any time, the hold
operation is aborted. This pin has an internal pullup.
VCC - Chip Power
Power
The VCC pin supplies the power for the chip during normal operation.
VSS - Chip Ground
Power
Ground.
VCAP - Power for Non-
volatile AutoStore
TM
Power
A capacitor should be connected with a minimum of 17uF, 5V minimum. Upon power down, VCAP
supplies the power for the AutoStore
TM operation whereby SRAM data elements are transferred
in parallel to the nonvolatile QuantumTrap
TM elements.
VRTCcap
Power
Capacitor supplied backup RTC supply voltage. (Left unconnected if VRTCbat is used.)
VRTCbat
Power
Battery supplied backup RTC supply voltage. (Left unconnected if VRTCcap is used. )
X1 - Crystal Out
Output
Crystal Connection, drives crystal on startup.
X2 - Crystal in
Input
Crystal Connection, 32.768Khz crystal.
HSB
- STORE
request and status
In/Output
When low this output indicates a Hardware Store is in progress. When pulled low externally to
the chip it will initiate a nonvolatile STORE operation. Left undriven the pin is weakly pulled up
internal to the chip. STORE operation will not be started when VCC is below Vswitch.
INT - interrupt out
Output
Pin which can be programmed to respond to the clock alarm, the watchdog timer, or the power
monitor. Programmable to either active high (push/pull) or active low (open-drain).
(Blank)
No Connect
Unlabeled pins should be left with no connections on the printed circuit board.
48 Pin SSOP
V CAP
V SS
V RTCbat
INT
V CC
V SS
V RTCcap
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
SI
X 1
SCK
X2
SO
V CC
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
HS B
CS
V SS
V SS
HO LD
PCB area usage.
See website for detailed
package size specifications.


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