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TMS470R1B1M Datasheet(PDF) 5 Page - Texas Instruments

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Part No. TMS470R1B1M
Description  16/32-Bit RISC Flash Microcontroller
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com

TMS470R1B1M Datasheet(HTML) 5 Page - Texas Instruments

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16/32-Bit RISC Flash Microcontroller
The flash memory on this device is a nonvolatile, electrically erasable and programmable memory implemented
with a 32-bit-wide data bus interface. The flash operates with a system clock frequency of up to 24 MHz or 30
MHz, depending on the input voltage. When in pipeline mode, the flash operates with a system clock frequency
of up to 48 MHz or 60 MHz, depending on the input voltage. For more detailed information on the flash, see the
F05 Flash section of this data sheet.
The memory security module (MSM) and the JTAG security module prevent unauthorized access and visibility to
on-chip memory, thereby preventing reverse engineering or manipulation of proprietary code.
The B1M device has twelve communication interfaces: two SPIs, three SCIs, two HECCs, and five I2Cs. The SPI
provides a convenient method of serial interaction for high-speed communications between similar shift-register
type devices. The SCI is a full-duplex, serial I/O interface intended for asynchronous communication between the
CPU and other peripherals using the standard non-return-to-zero (NRZ) format. The HECC uses a serial,
multimaster communication protocol that efficiently supports distributed real-time control with robust communi-
cation rates of up to 1 megabit per second (Mbps). These CAN peripherals are ideal for applications operating in
noisy and harsh environments (e.g., industrial fields) that require reliable serial communication or multiplexed
wiring. The I2C module is a multi-master communication module providing an interface between the B1M
microcontroller and an I2C-compatible device via the I2C serial bus. The I2C supports both 100 Kbps and 400
Kbps speeds. For more detailed functional information on the SPI, SCI, and CAN peripherals, see the specific
reference guides (literature numbers SPNU195, SPNU196, and SPNU197). For more detailed functional
information on the I2C, see the TMS470R1x Inter-Integrated Circuit (I2C) Reference Guide (literature number
The HET is an advanced intelligent timer that provides sophisticated timing functions for real-time applications.
The timer is software-controlled, using a reduced instruction set, with a specialized timer micromachine and an
attached I/O port. The HET can be used for compare, capture, or general-purpose I/O. It is especially well suited
for applications requiring multiple sensor information and drive actuators with complex and accurate time pulses.
The HET used in this device is the high-end timer lite. It has fewer I/Os than the usual 32 in a standard HET. For
more detailed functional information on the HET, see the TMS470R1x High-End Timer (HET) Reference Guide
(literature number SPNU199).
The B1M HET peripheral contains the XOR-share feature. This feature allows two adjacent HET high-resolution
channels to be XORed together, making it possible to output smaller pulses than a standard HET. For more
detailed information on the HET XOR-share feature, see the TMS470R1x High-End Timer (HET) Reference
Guide (literature number SPNU199).
The B1M device has one 10-bit-resolution, sample-and-hold MibADC. Each of the MibADC channels can be
converted individually or can be grouped by software for sequential conversion sequences. There are three
separate groupings, two of which can be triggered by an external event. Each sequence can be converted once
when triggered or configured for continuous conversion mode. For more detailed functional information on the
MibADC, see the TMS470R1x Multi-Buffered Analog-to-Digital Converter (MibADC) Reference Guide (literature
number SPNU206).
The zero-pin phase-locked loop (ZPLL) clock module contains a phase-locked loop, a clock-monitor circuit, a
clock-enable circuit, and a prescaler (with prescale values of 1–8). The function of the ZPLL is to multiply the
external frequency reference to a higher frequency for internal use. The ZPLL provides ACLK to the system
(SYS) module. The SYS module subsequently provides system clock (SYSCLK), real-time interrupt clock
(RTICLK), CPU clock (MCLK), and peripheral interface clock (ICLK) to all other B1M device modules. For more
detailed functional information on the ZPLL, see the TMS470R1x Zero-Pin Phase-Locked Loop (ZPLL) Clock
Module Reference Guide (literature number SPNU212).
ACLK should not be confused with the MibADC internal clock, ADCLK. ACLK is the
continuous system clock from an external resonator/crystal reference.
The expansion bus module (EBM) is a standalone module that supports the multiplexing of the GIO functions
and the expansion bus interface. For more information on the EBM, see the TMS470R1x Expansion Bus Module
(EBM) Reference Guide (literature number SPNU222).

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