CY7C1001-12 datasheet(5/9 Pages) CYPRESS

Part #	CY7C1001-12

Description	256K x 4 Static RAM with Separate I/O

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Manufacturer	CYPRESS [Cypress Semiconductor]

Direct Link	http://www.cypress.com

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CY7C1001

CY7C1002

PRELIMINARY

5

Write Cycle No. 1 (CE Controlled)[9, 14]

DATA VALID

HIGH IMPEDANCE

tSCE

tAW

tSA

tPWE

tHA

tHD

tSD

DATA VALID

tADV

C1001-8

tLZCE

tHZCE

tWC

tDCE

Switching Waveforms (continued)

ADDRESS

CE

WE

DATA OUT

(7C1002)

DATA IN

DATA OUT

(7C1001)

Write Cycle No. 2 (WE Controlled)[9]

C1001-9

tWC

DATA VALID

HIGH IMPEDANCE

tSCE

tAW

tSA

tPWE

tHA

tHD

tHZWE

tLZWE

tSD

tDWE

DATA VALID

tADV

tHZCE

ADDRESS

CE

WE

DATA OUT

(7C1001)

DATA IN

DATA OUT

(7C1002)

Note:

14. If CE goes HIGH simultaneously with WE going HIGH, the output

remains in a highimpedance state (7C1002 only).

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CY7C1001-12 Datasheet(PDF) 5 Page - Cypress Semiconductor

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