AAT1157

1MHz 1.2A Buck DC/DC Converter

2

1157.2005.11.1.4

Pin Descriptions

Pin Configuration

QFN33-16

(Top View)

VP

VP

VP

PGND

PGND

PGND

1

2

3

4

12

11

10

9

VCC

FB

Pin #

Symbol

Function

1, 2, 3

PGND

Main power ground return pin. Connect to the output and input capacitor

return. (See board layout rules.)

4

FB

Feedback input pin. This pin is connected to the converter output. It is used to

set the output of the converter to regulate to the desired value via an internal

resistive divider. For an adjustable output, an external resistive divider is con-

nected to this pin.

5

SGND

Signal ground. Connect the return of all small signal components to this pin.

(See board layout rules.)

7

EN

Enable input pin. A logic high enables the converter; a logic low forces the

AAT1157 into shutdown mode reducing the supply current to less than 1µA.

The pin should not be left floating.

6, 8, 16

N/C

Not internally connected.

9

VCC

Bias supply. Supplies power for the internal circuitry. Connect to input power

via low pass filter with decoupling to SGND.

10, 11, 12

VP

Input supply voltage for the converter power stage. Must be closely decoupled

to PGND.

13, 14, 15

LX

Connect inductor to these pins. Switching node internally connected to the

drain of both high- and low-side MOSFETs.

EP

Exposed paddle (bottom); connect to PGND directly beneath package.