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IDT74LVCH16543A Datasheet(PDF) 1 Page - Integrated Device Technology

Part No. IDT74LVCH16543A
Description  3.3V CMOS 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
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IDT74LVCH16543A Datasheet(HTML) 1 Page - Integrated Device Technology

   
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INDUSTRIALTEMPERATURERANGE
IDT74LVCH16543A
3.3V CMOS 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
1
JANUARY 2004
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
© 2004 Integrated Device Technology, Inc.
DSC-4612/3
FEATURES:
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
•VCC = 3.3V ± 0.3V, Normal Range
•VCC = 2.7V to 3.6V, Extended Range
• CMOS power levels (0.4
µµµµµ W typ. static)
• All inputs, outputs, and I/O are 5V tolerant
• Supports hot insertion
• Available in SSOP and TSSOP packages
FUNCTIONAL BLOCK DIAGRAM
DRIVE FEATURES:
• High Output Drivers: ±24mA
• Reduced system switching noise
APPLICATIONS:
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
IDT74LVCH16543A
DESCRIPTION
The LVCH16543A 16-bit registered transceiver is built using advanced
dual metal CMOS technology. The LVCH16543A can be used as two 8-bit
transceivers or one 16-bit transceiver. Separate latch-enable (LEAB or
LEBA) and output-enable (OEAB or OEBA) inputs are provided for each
register to permit independent control in either direction of data flow. The
A-to-B enable (CEAB) input must be low in order to enter data from the A
portortooutput data fromtheBport. LEABcontrolsthelatch function. When
LEAB is low, the A to B latches are transparent. A subsequent low-to-high
transition of LEAB puts the A latches in the storage mode. OEAB performs
output enable function on the B port. Data flow from the B port to the A port
is similar but requires using CEBA, LEBA, and OEBA inputs. Flow-through
organization of signal pins simplifies layout. All inputs are designed with
hysteresis for improved noise margin.
All pins of this 16-bit registered transceiver can be driven from either 3.3V
or 5V devices. This feature allows the use of this device as a translator in
a mixed 3.3V/5V supply system.
The LVCH16543A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
The LVCH16543A has “bus-hold” which retains the inputs’ last state
whenever the input goes to a high impedance. This prevents floating inputs
and eliminates the need for pull-up/down resistors.
3.3V CMOS 16-BIT
REGISTERED TRANSCEIVER
WITH 3-STATE OUTPUTS,
5 VOLT TOLERANT I/O, BUS-HOLD
1
B1
1
LEAB
1
CEAB
1
OEAB
1
LEBA
1
CEBA
1
OEBA
TO SEVEN OTHER CHANNELS
1
A1
2
B1
2
LEAB
2
CEAB
2
OEAB
2
LEBA
2
CEBA
2
OEBA
2
A1
56
54
55
1
3
2
5
29
31
30
28
26
27
15
42
52
C1
1D
C1
1D
C1
1D
TO SEVEN OTHER CHANNELS
C1
1D


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