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IDT74ALVCF162835A Datasheet(PDF) 2 Page - Integrated Device Technology

Part No. IDT74ALVCF162835A
Description  3.3V CMOS 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
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IDT74ALVCF162835A Datasheet(HTML) 2 Page - Integrated Device Technology

   
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INDUSTRIALTEMPERATURERANGE
2
IDT74ALVCF162835A
3.3V CMOS 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
PIN CONFIGURATION
Symbol
Description
Max
Unit
VTERM(2) Terminal Voltage with Respect to GND
–0.5 to +4.6
V
VTERM(3) Terminal Voltage with Respect to GND
–0.5 to VCC+0.5
V
TSTG
Storage Temperature
–65 to +150
°C
IOUT
DC Output Current
–50 to +50
mA
IIK
Continuous Clamp Current,
±50
mA
VI < 0 or VI > VCC
IOK
Continuous Clamp Current, VO < 0
–50
mA
ICC
Continuous Current through each
±100
mA
ISS
VCC or GND
ABSOLUTE MAXIMUM RATINGS(1)
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. VCC terminals.
3. All terminals except VCC.
Pin Names
Description
OE
3-State Output Enable Inputs (Active LOW)
CLK
Register Input Clock
LE
Latch Enable (Transparent HIGH)
A x
Data Inputs
Y x
3-State Outputs
PIN DESCRIPTION
TSSOP/ TVSOP
TOP VIEW
GN D
GN D
GN D
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
48
49
50
51
52
53
54
55
56
1
GN D
GN D
GND
25
26
27
28
32
31
30
29
GN D
NC
A1
NC
NC
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
Y10
Y11
Y12
Y13
Y14
Y15
Y16
Y17
Y18
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
VCC
A16
A17
A18
GN D
VCC
CLK
GN D
VCC
VCC
GN D
OE
LE
NOTE:
1. As applicable to the device type.
Symbol
Parameter(1)
Conditions
Min.
Typ.
Max. Unit
CIN
Input Capacitance
VIN = 0V
4
5
6
pF
COUT
Output Capacitance
VOUT = 0V
7
9
pF
COUT
I/O Port Capacitance VIN = 0V
7
9
pF
CAPACITANCE (TA= +25°C, F = 1.0MHz)
NOTES:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High-Impedance
↑ = LOW-to-HIGH Transition
2. Output level before indicated steady-state input conditions were established, pro-
vided that CLK is HIGH before LE went LOW.
3. Output level before the indicated steady-state input conditions were established.
FUNCTION TABLE(1)
Inputs
Outputs
OE
LE
CLK
Ax
Yx
H
XXX
Z
LH
X
L
L
LH
X
H
H
LL
LL
LL
HH
LL
H
X
Y
0
(2)
LLL
X
Y
0
(3)


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