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GS71116ATP/J/U
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.07 12/2004
8/16
© 2001, GSI Technology
Read Cycle 2: WE = VIH
* These parameters are sampled and are not 100% tested.
Write Cycle
Parameter
Symbol
-7
-8
-10
-12
Unit
MinMax
MinMax
MinMax
MinMax
Write cycle time
tWC
7
—
8
—
10
—
12
—
ns
Address valid to end of write
tAW
5
—
5.5
—
7
—
8
—
ns
Chip enable to end of write
tCW
5
—
5.5
—
7
—
8
—
ns
Byte enable to end of write
tBW
5
—
5.5
—
7
—
8
—
ns
Data set up time
tDW
3.5
—
4
—
5
—
6
—
ns
Data hold time
tDH
0
—
0
—
0
—
0
—
ns
Write pulse width
tWP
5
—
5.5
—
7
—
8
—
ns
Address set up time
tAS
0
—
0
—
0
—
0
—
ns
Write recovery time (WE)
tWR
0—0—0—0—
ns
Write recovery time (CE)
tWR1
0
—0—0—0—
ns
Output Low Z from end of write
tWLZ*
3—3—3—3—
ns
Write to output in High Z
tWHZ*
—3—
3.5
—4—
5
ns
tAA
tRC
Address
tAC
tLZ
tAB
tBLZ
tOE
tOLZ
CE
UB, LB
OE
Data Out
tHZ
tBHZ
tOHZ
Data valid
High impedance