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S24VP04S-BTE13 Datasheet(PDF) 2 Page - List of Unclassifed Manufacturers

Part # S24VP04S-BTE13
Description  4K Serial E2PROM with a Precision Low-VCC Lockout Circuit
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Manufacturer  ETC1 [List of Unclassifed Manufacturers]
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S24VP04S-BTE13 Datasheet(HTML) 2 Page - List of Unclassifed Manufacturers

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S24VP04
2008 1.4 5/15/98
Address Inputs A0, A1, A2- Device Address Inputs
These inputs are unused by the S24VP04; however, to
ensure proper operation they should be left unconnected
or tied to ground. The should not be tied high.
ENDURANCE AND DATA RETENTION
The S24VP04 is designed for applications requiring
1,000,000 erase/write cycles and unlimited read cycles. It
provides 100 years of secure data retention, with or
without power applied, after the execution of 1,000,000
erase/write cycles.
DEVICE OPERATION
APPLICATIONS
The S24VP04 was designed specifically for applications
where the integrity of the stored data is paramount. In
recent years, as the operating voltage range of serial
E2PROMs has widened, most semiconductor manufac-
turers have arbitrarily eliminated their VCC sense circuits.
The S24VP04 will protect your data by guaranteeing write
lockout below the selected VCC Lockout voltage.
VCC Lockout
The S24VP04 has an on-board precision VCC sense
circuit. Whenever VCC is below VLOCK, the S24VP04 will
disable the internal write circuitry. The VCC lockout circuit
will ensure a higher level of data integrity than can be
expected from industry standard devices that have either
a very loose specification or no VCC lockout specification.
During a power-on sequence all writes will be inhibited
below the VLOCK level and will continue to be held in a write
inhibit state for approximately 200ms after VCC reaches,
then stays at or above VLOCK. The 200ms delay provides
a buffer space for the microcontroller to complete its
power-on initialization routines (reading is OK) while still
protecting against inadvertent writes.
During a power-down sequence initiation of writes will be
inhibited whenever VCC falls below VLOCK. This will guard
against the system’s microcontroller performing an inad-
vertent write within the ‘danger zone’. (see AN001)
PIN DESCRIPTIONS
Serial Clock (SCL) - The SCL input is used to clock data
into and out of the device. In the WRITE mode, data must
remain stable while SCL is HIGH. In the READ mode, data
is clocked out on the falling edge of SCL.
Serial Data (SDA) - The SDA pin is a bidirectional pin
used to transfer data into and out of the device. Data may
change only when SCL is LOW, except START and STOP
conditions. It is an open-drain output and may be wire-
ORed with any number of open-drain or open-collector
outputs.
PIN NAMES
A0, A1,A2
Address Inputs
SDA
Serial Data I/O
SCL
Serial Clock Input
DC
Don’t Care
GND
Ground
VCC
Supply Voltage
PIN CONFIGURATIONS
8
7
6
5
1
2
3
4
A0
A1
A2
GND
VCC
DC
SCL
SDA
A0
A1
A2
GND
VCC
DC
SCL
SDA
Plastic Dual-in-line
“P” Package
8
7
6
5
1
2
3
4
JEDEC Small Outline
“S” Package
2008 ILL1 1.2


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