Electronic Components Datasheet Search
  English  ▼

Delete All


Preview PDF Download HTML

AT17F16-30JI Datasheet(PDF) 7 Page - ATMEL Corporation

Part No. AT17F16-30JI
Description  FPGA Configuration Flash Memory
Download  18 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT17F16-30JI Datasheet(HTML) 7 Page - ATMEL Corporation

Back Button AT17F16-30JI Datasheet HTML 3Page - ATMEL Corporation AT17F16-30JI Datasheet HTML 4Page - ATMEL Corporation AT17F16-30JI Datasheet HTML 5Page - ATMEL Corporation AT17F16-30JI Datasheet HTML 6Page - ATMEL Corporation AT17F16-30JI Datasheet HTML 7Page - ATMEL Corporation AT17F16-30JI Datasheet HTML 8Page - ATMEL Corporation AT17F16-30JI Datasheet HTML 9Page - ATMEL Corporation AT17F16-30JI Datasheet HTML 10Page - ATMEL Corporation AT17F16-30JI Datasheet HTML 11Page - ATMEL Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 18 page
background image
FPGA Master Serial
Mode Summary
The I/O and logic functions of any SRAM-based FPGA are established by a configura-
tion program. The program is loaded either automatically upon power-up, or on
command, depending on the state of the FPGA mode pins. In Master mode, the FPGA
automatically loads the configuration program from an external memory. The AT17F
Serial Configuration PROM has been designed for compatibility with the Master Serial
This document discusses the Atmel AT40K, AT40KAL and AT94KAL applications as
well as Xilinx applications.
Control of
Most connections between the FPGA device and the AT17F Serial Configurator PROM
are simple and self-explanatory.
The DATA output of the AT17F Series Configurator drives DIN of the FPGA devices.
The master FPGA CCLK output drives the CLK input of the AT17F Series
•The CEO output of any AT17F Series Configurator drives the CE input of the next
Configurator in a cascade chain of configurator devices.
SER_EN must be connected to VCC or allowed to float to logic High via the internal
pull-up resistor (except during ISP).
The READY pin is available as an open-collector indicator of the device’s reset
status; it is driven Low while the device is in its power-on reset cycle and released
(tri-stated) when the cycle is complete.
PAGE_EN must be held Low if download paging is not desired. The PAGESEL[1:0]
inputs must be tied off High or Low. If paging is desired, PAGE_EN must be High
and the PAGESEL pins must be set to High or Low such that the desired page is
selected, see Table 2 on page 6.
Cascading Serial
For multiple FPGAs configured as a daisy-chain, or for FPGAs requiring larger configu-
ration memories, cascaded configurators provide additional memory.
After the last bit from the first configurator is read, the clock signal to the configurator
asserts its CEO output Low and disables its DATA line driver. The second configurator
recognizes the Low level on its CE input and enables its DATA output.
After configuration is complete, the address counters of all cascaded configurators are
reset if the RESET/OE on each configurator is driven to its active (Low) level.
If the address counters are not to be reset upon completion, then the RESET/OE input
can be tied to its inactive (High) level.
Programming Mode
The programming mode is entered by bringing SER_EN Low. In this mode the chip can
be programmed by the 2-wire serial bus. The programming is done at VCC supply only.
Programming super voltages are generated inside the chip. The AT17F parts are
read/write at 3.3V nominal. Refer to the AT17F Programming Specification available on
the Atmel web site (www.atmel.com) for more programming details. AT17F devices are
supported by the Atmel ATDH2200E programming system along with many third party
Standby Mode
The AT17F Series Configurators enter a low-power standby mode whenever SER_EN
is High and CE is asserted High. In this mode, the AT17F Configurator consumes less
than 5 mA of current at 3.6V. The output remains in a high-impedance state regardless
of the state of the OE input.

Similar Part No. - AT17F16-30JI

ManufacturerPart No.DatasheetDescription
ATMEL Corporation
ATMEL Corporation
AT17F16-30JU ATMEL-AT17F16-30JU Datasheet
333Kb / 20P
   FPGA Configuration Flash Memory
More results

Similar Description - AT17F16-30JI

ManufacturerPart No.DatasheetDescription
ATMEL Corporation
ATMEL Corporation
AT17F16A ATMEL-AT17F16A Datasheet
290Kb / 16P
   FPGA Configuration Flash Memory
AT17F040 ATMEL-AT17F040 Datasheet
307Kb / 19P
AT17F040 ATMEL-AT17F040_08 Datasheet
340Kb / 19P
   FPGA Configuration Flash Memory
AT17F32 ATMEL-AT17F32 Datasheet
252Kb / 14P
   FPGA Configuration Flash Memory
AT17F040A ATMEL-AT17F040A Datasheet
326Kb / 16P
   FPGA Configuration Flash Memory
AT17F16A ATMEL-AT17F16A Datasheet
210Kb / 15P
   FPGA Configuration Flash Memory
AT18F010 ATMEL-AT18F010 Datasheet
347Kb / 16P
   FPGA Configuration Flash Memory
AT17F16 ATMEL-AT17F16_08 Datasheet
333Kb / 20P
   FPGA Configuration Flash Memory
AT17F32A ATMEL-AT17F32A Datasheet
190Kb / 14P
   FPGA Configuration Flash Memory
AT17N256 ATMEL-AT17N256_07 Datasheet
308Kb / 18P
   FPGA Configuration Memory
More results

Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18 

Datasheet Download

Go To PDF Page

Link URL

Privacy Policy
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com

Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz